[src/trunk]: src/sys/arch/arm/cortex sc_enabled_sgippi can be updated from an...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f126a10e8d32
branches:  trunk
changeset: 977775:f126a10e8d32
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sun Nov 01 14:30:12 2020 +0000

description:
sc_enabled_sgippi can be updated from any CPU, so use atomic_or/atomic_and

diffstat:

 sys/arch/arm/cortex/gicv3.c |  9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diffs (44 lines):

diff -r af66db4b4188 -r f126a10e8d32 sys/arch/arm/cortex/gicv3.c
--- a/sys/arch/arm/cortex/gicv3.c       Sun Nov 01 14:25:48 2020 +0000
+++ b/sys/arch/arm/cortex/gicv3.c       Sun Nov 01 14:30:12 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gicv3.c,v 1.31 2020/11/01 14:19:42 jmcneill Exp $ */
+/* $NetBSD: gicv3.c,v 1.32 2020/11/01 14:30:12 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -31,7 +31,7 @@
 #define        _INTR_PRIVATE
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.31 2020/11/01 14:19:42 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gicv3.c,v 1.32 2020/11/01 14:30:12 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -41,6 +41,7 @@
 #include <sys/systm.h>
 #include <sys/cpu.h>
 #include <sys/vmem.h>
+#include <sys/atomic.h>
 
 #include <machine/cpufunc.h>
 
@@ -121,7 +122,7 @@
        const u_int group = irqbase / 32;
 
        if (group == 0) {
-               sc->sc_enabled_sgippi |= mask;
+               atomic_or_32(&sc->sc_enabled_sgippi, mask);
                gicr_write_4(sc, ci->ci_gic_redist, GICR_ISENABLER0, mask);
                while (gicr_read_4(sc, ci->ci_gic_redist, GICR_CTLR) & GICR_CTLR_RWP)
                        ;
@@ -140,7 +141,7 @@
        const u_int group = irqbase / 32;
 
        if (group == 0) {
-               sc->sc_enabled_sgippi &= ~mask;
+               atomic_and_32(&sc->sc_enabled_sgippi, ~mask);
                gicr_write_4(sc, ci->ci_gic_redist, GICR_ICENABLER0, mask);
                while (gicr_read_4(sc, ci->ci_gic_redist, GICR_CTLR) & GICR_CTLR_RWP)
                        ;