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[src/trunk]: src/sys/arch/mips/mips Adjust previous - move consolidated debug...
details: https://anonhg.NetBSD.org/src/rev/111877c22fa6
branches: trunk
changeset: 972950:111877c22fa6
user: simonb <simonb%NetBSD.org@localhost>
date: Sun Jun 14 12:02:07 2020 +0000
description:
Adjust previous - move consolidated debug printfs _after_ core specific
overrides, not before them.
diffstat:
sys/arch/mips/mips/cache.c | 79 ++++++++++++++++++++++-----------------------
1 files changed, 39 insertions(+), 40 deletions(-)
diffs (107 lines):
diff -r 8061b2860db1 -r 111877c22fa6 sys/arch/mips/mips/cache.c
--- a/sys/arch/mips/mips/cache.c Sun Jun 14 09:55:37 2020 +0000
+++ b/sys/arch/mips/mips/cache.c Sun Jun 14 12:02:07 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.c,v 1.63 2020/06/14 09:55:37 simonb Exp $ */
+/* $NetBSD: cache.c,v 1.64 2020/06/14 12:02:07 simonb Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.63 2020/06/14 09:55:37 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.64 2020/06/14 12:02:07 simonb Exp $");
#include "opt_cputype.h"
#include "opt_mips_cache.h"
@@ -1345,44 +1345,6 @@
}
}
-#define CACHE_DEBUG
-#ifdef CACHE_DEBUG
- printf("MIPS32/64 params: cpu arch: %d\n", opts->mips_cpu_arch);
- printf("MIPS32/64 params: TLB entries: %d\n", opts->mips_num_tlb_entries);
- if (mci->mci_picache_line_size == 0) {
- printf("MIPS32/64 params: no Icache\n");
- } else {
- printf("MIPS32/64 params: %s: line=%d, total=%d, "
- "ways=%d, sets=%d, colors=%d\n", "Icache",
- mci->mci_picache_line_size,
- mci->mci_picache_way_size * mci->mci_picache_ways,
- mci->mci_picache_ways,
- mci->mci_picache_way_size / mci->mci_picache_line_size,
- mci->mci_picache_way_size >> PAGE_SHIFT);
- }
- if (mci->mci_pdcache_line_size == 0) {
- printf("MIPS32/64 params: no Dcache\n");
- } else {
- printf("MIPS32/64 params: %s: line=%d, total=%d, "
- "ways=%d, sets=%d, colors=%d\n", "Dcache",
- mci->mci_pdcache_line_size,
- mci->mci_pdcache_way_size * mci->mci_pdcache_ways,
- mci->mci_pdcache_ways,
- mci->mci_pdcache_way_size / mci->mci_pdcache_line_size,
- mci->mci_pdcache_way_size >> PAGE_SHIFT);
- }
- if (mci->mci_sdcache_line_size != 0) {
- printf("MIPS32/64 params: %s: line=%d, total=%d, "
- "ways=%d, sets=%d, colors=%d\n", "SDcache",
- mci->mci_sdcache_line_size,
- mci->mci_sdcache_way_size * mci->mci_sdcache_ways,
- mci->mci_sdcache_ways,
- mci->mci_sdcache_way_size / mci->mci_sdcache_line_size,
- mci->mci_sdcache_way_size >> PAGE_SHIFT);
- }
-#endif
-
-
/*
* calculate the alias masks and from them set to virtual alias flags.
*/
@@ -1442,6 +1404,43 @@
break;
}
+#define CACHE_DEBUG
+#ifdef CACHE_DEBUG
+ printf("MIPS32/64 params: cpu arch: %d\n", opts->mips_cpu_arch);
+ printf("MIPS32/64 params: TLB entries: %d\n", opts->mips_num_tlb_entries);
+ if (mci->mci_picache_line_size == 0) {
+ printf("MIPS32/64 params: no Icache\n");
+ } else {
+ printf("MIPS32/64 params: %s: line=%d, total=%d, "
+ "ways=%d, sets=%d, colors=%d\n", "Icache",
+ mci->mci_picache_line_size,
+ mci->mci_picache_way_size * mci->mci_picache_ways,
+ mci->mci_picache_ways,
+ mci->mci_picache_way_size / mci->mci_picache_line_size,
+ mci->mci_picache_way_size >> PAGE_SHIFT);
+ }
+ if (mci->mci_pdcache_line_size == 0) {
+ printf("MIPS32/64 params: no Dcache\n");
+ } else {
+ printf("MIPS32/64 params: %s: line=%d, total=%d, "
+ "ways=%d, sets=%d, colors=%d\n", "Dcache",
+ mci->mci_pdcache_line_size,
+ mci->mci_pdcache_way_size * mci->mci_pdcache_ways,
+ mci->mci_pdcache_ways,
+ mci->mci_pdcache_way_size / mci->mci_pdcache_line_size,
+ mci->mci_pdcache_way_size >> PAGE_SHIFT);
+ }
+ if (mci->mci_sdcache_line_size != 0) {
+ printf("MIPS32/64 params: %s: line=%d, total=%d, "
+ "ways=%d, sets=%d, colors=%d\n", "SDcache",
+ mci->mci_sdcache_line_size,
+ mci->mci_sdcache_way_size * mci->mci_sdcache_ways,
+ mci->mci_sdcache_ways,
+ mci->mci_sdcache_way_size / mci->mci_sdcache_line_size,
+ mci->mci_sdcache_way_size >> PAGE_SHIFT);
+ }
+#endif
+
mipsNN_cache_init(cfg, cfg1);
if (opts->mips_cpu_flags &
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