Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/sh3/include Definitions for ST40 Privileged Mapping...
details: https://anonhg.NetBSD.org/src/rev/850069c6ef2e
branches: trunk
changeset: 974142:850069c6ef2e
user: uwe <uwe%NetBSD.org@localhost>
date: Sat Jul 25 22:26:59 2020 +0000
description:
Definitions for ST40 Privileged Mapping Buffer.
diffstat:
sys/arch/sh3/include/pmb.h | 80 ++++++++++++++++++++++++++++++++++++++++++++++
1 files changed, 80 insertions(+), 0 deletions(-)
diffs (84 lines):
diff -r 2d5647e9ac6e -r 850069c6ef2e sys/arch/sh3/include/pmb.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/sh3/include/pmb.h Sat Jul 25 22:26:59 2020 +0000
@@ -0,0 +1,80 @@
+/* $NetBSD: pmb.h,v 1.1 2020/07/25 22:26:59 uwe Exp $ */
+/*
+ * Copyright (c) 2020 Valery Ushakov
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _SH3_PMB_H_
+#define _SH3_PMB_H_
+/*
+ * ST40 Privileged Mapping Buffer (PMB)
+ *
+ * Original SuperH can handle only 29-bit external memory space.
+ * "The physical address space is permanently mapped onto 29-bit
+ * external memory space." See <sh3/cpu.h>.
+ *
+ * ST40-200, ST40-300 and ST40-500 have "space enhanced" SE mode where
+ * the mapping from the physical address space P1 and P2 segments to
+ * the 32-bit external memory space is defined via 16-entry PMB.
+ */
+
+
+/* on ST40-200 and ST40-500 SE bit is in MMUCR */
+#define ST40_MMUCR_SE 0x00000010
+
+
+/* Physical address space control register (ST4-300) */
+#define ST40_PMB_PASCR 0xff000070
+#define ST40_PASCR_UB_MASK 0x0000000f
+#define ST40_PASCR_SE 0x80000000
+
+
+/* Memory-mapped PMB */
+#define ST40_PMB_ENTRY 16
+
+#define ST40_PMB_E_MASK 0x00000f00
+#define ST40_PMB_E_SHIFT 8
+
+
+/* PMB Address Array */
+#define ST40_PMB_AA 0xf6100000
+#define ST40_PMB_AA_V 0x00000100
+#define ST40_PMB_AA_VPN_MASK 0xff000000
+#define ST40_PMB_AA_VPN_SHIFT 24
+
+
+/* PMB Data Array */
+#define ST40_PMB_DA 0xf7100000
+#define ST40_PMB_DA_WT 0x00000001
+#define ST40_PMB_DA_C 0x00000008
+#define ST40_PMB_DA_UB 0x00000200
+#define ST40_PMB_DA_SZ_MASK 0x00000090
+#define ST40_PMB_DA_SZ_16M 0x00000000
+#define ST40_PMB_DA_SZ_64M 0x00000010
+#define ST40_PMB_DA_SZ_128M 0x00000080
+#define ST40_PMB_DA_SZ_512M 0x00000090
+#define ST40_PMB_DA_V 0x00000100
+#define ST40_PMB_DA_PPN_MASK 0xff000000
+#define ST40_PMB_DA_PPN_SHIFT 24
+
+#endif /* !_SH3_PMB_H_ */
Home |
Main Index |
Thread Index |
Old Index