[src/trunk]: src/sys/arch/mips/include Add a space in a comment.

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/1178b0601777
branches:  trunk
changeset: 974182:1178b0601777
user:      simonb <simonb%NetBSD.org@localhost>
date:      Sun Jul 26 07:13:51 2020 +0000

description:
Add a space in a comment.

diffstat:

 sys/arch/mips/include/mips_param.h |  4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diffs (18 lines):

diff -r f8498ac4442e -r 1178b0601777 sys/arch/mips/include/mips_param.h
--- a/sys/arch/mips/include/mips_param.h        Sun Jul 26 07:02:14 2020 +0000
+++ b/sys/arch/mips/include/mips_param.h        Sun Jul 26 07:13:51 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_param.h,v 1.43 2020/07/23 15:24:37 skrll Exp $    */
+/*     $NetBSD: mips_param.h,v 1.44 2020/07/26 07:13:51 simonb Exp $   */
 
 /*-
  * Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -82,7 +82,7 @@
 
 /*
  * Most MIPS have a cache line size of 32 bytes, but Cavium chips
- * have a line size 128bytes and we need to cover the larger size.
+ * have a line size 128 bytes and we need to cover the larger size.
  */
 #define COHERENCY_UNIT 128
 #define CACHE_LINE_SIZE        128