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[src/trunk]: src/sys/dev Regen for new sys/dev/devlist2h.awk
details: https://anonhg.NetBSD.org/src/rev/3c9bbfbd6327
branches: trunk
changeset: 984256:3c9bbfbd6327
user: pgoyette <pgoyette%NetBSD.org@localhost>
date: Tue Jun 29 21:04:02 2021 +0000
description:
Regen for new sys/dev/devlist2h.awk
diffstat:
sys/dev/hdaudio/hdaudiodevs.h | 6 +-
sys/dev/hdaudio/hdaudiodevs_data.h | 6 +-
sys/dev/mii/miidevs.h | 600 +++++++++---------
sys/dev/mii/miidevs_data.h | 1093 ++++++++++++++++++++++++++++-------
sys/dev/pci/pcidevs.h | 6 +-
sys/dev/pci/pcidevs_data.h | 6 +-
sys/dev/usb/usbdevs.h | 6 +-
sys/dev/usb/usbdevs_data.h | 6 +-
8 files changed, 1183 insertions(+), 546 deletions(-)
diffs (truncated from 2156 to 300 lines):
diff -r 1f755d50a606 -r 3c9bbfbd6327 sys/dev/hdaudio/hdaudiodevs.h
--- a/sys/dev/hdaudio/hdaudiodevs.h Tue Jun 29 21:03:36 2021 +0000
+++ b/sys/dev/hdaudio/hdaudiodevs.h Tue Jun 29 21:04:02 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: hdaudiodevs.h,v 1.5 2020/04/29 07:36:22 nia Exp $ */
+/* $NetBSD: hdaudiodevs.h,v 1.6 2021/06/29 21:04:02 pgoyette Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@@ -259,3 +259,7 @@
/* VMware */
#define HDAUDIO_PRODUCT_VMWARE_VIRTUAL_HDA 0x1975 /* Virtual HDA */
+
+/* Define format strings for non-existent values */
+#define hdaudio_id1_format "vendor %4.4x"
+#define hdaudio_id2_format "product %4.4x"
diff -r 1f755d50a606 -r 3c9bbfbd6327 sys/dev/hdaudio/hdaudiodevs_data.h
--- a/sys/dev/hdaudio/hdaudiodevs_data.h Tue Jun 29 21:03:36 2021 +0000
+++ b/sys/dev/hdaudio/hdaudiodevs_data.h Tue Jun 29 21:04:02 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: hdaudiodevs_data.h,v 1.5 2020/04/29 07:36:22 nia Exp $ */
+/* $NetBSD: hdaudiodevs_data.h,v 1.6 2021/06/29 21:04:02 pgoyette Exp $ */
/*
* THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
@@ -35,7 +35,7 @@
* SUCH DAMAGE.
*/
-static const uint16_t hdaudio_vendors[] = {
+static const uint32_t hdaudio_vendors[] = {
HDAUDIO_VENDOR_ATI, 1, 0,
HDAUDIO_VENDOR_NVIDIA, 5, 0,
HDAUDIO_VENDOR_REALTEK, 12, 0,
@@ -49,7 +49,7 @@
HDAUDIO_VENDOR_SIGMATEL, 24, 0,
};
-static const uint16_t hdaudio_products[] = {
+static const uint32_t hdaudio_products[] = {
HDAUDIO_VENDOR_ATI, HDAUDIO_PRODUCT_ATI_RS600_HDMI_1,
78, 84, 0,
HDAUDIO_VENDOR_ATI, HDAUDIO_PRODUCT_ATI_RS600_HDMI_2,
diff -r 1f755d50a606 -r 3c9bbfbd6327 sys/dev/mii/miidevs.h
--- a/sys/dev/mii/miidevs.h Tue Jun 29 21:03:36 2021 +0000
+++ b/sys/dev/mii/miidevs.h Tue Jun 29 21:04:02 2021 +0000
@@ -1,7 +1,7 @@
-/* $NetBSD: miidevs.h,v 1.165 2020/06/23 14:35:59 msaitoh Exp $ */
+/* $NetBSD: miidevs.h,v 1.166 2021/06/29 21:04:02 pgoyette Exp $ */
/*
- * THIS FILE AUTOMATICALLY GENERATED. DO NOT EDIT.
+ * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT.
*
* generated from:
* NetBSD: miidevs,v 1.168 2020/06/23 14:35:36 msaitoh Exp
@@ -56,76 +56,76 @@
* Use "make -f Makefile.miidevs" to regenerate miidevs.h and miidevs_data.h
*/
-#define MII_OUI_AMD 0x00001a /* Advanced Micro Devices */
-#define MII_OUI_TRIDIUM 0x0001f0 /* Tridium */
-#define MII_OUI_DATATRACK 0x0002c6 /* Data Track Technology */
-#define MII_OUI_AGERE 0x00053d /* Agere */
-#define MII_OUI_QUAKE 0x000897 /* Quake Technologies */
-#define MII_OUI_BANKSPEED 0x0006b8 /* Bankspeed Pty */
-#define MII_OUI_NETEXCELL 0x0008bb /* NetExcell */
-#define MII_OUI_NETAS 0x0009c3 /* Netas */
-#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */
-#define MII_OUI_AELUROS 0x000b25 /* Aeluros */
-#define MII_OUI_RALINK 0x000c43 /* Ralink Technology */
-#define MII_OUI_ASIX 0x000ec6 /* ASIX */
-#define MII_OUI_BROADCOM 0x001018 /* Broadcom Corporation */
-#define MII_OUI_MICREL 0x0010a1 /* Micrel */
-#define MII_OUI_ALTIMA 0x0010a9 /* Altima Communications */
-#define MII_OUI_ENABLESEMI 0x0010dd /* Enable Semiconductor */
-#define MII_OUI_SUNPLUS 0x001105 /* Sunplus Technology */
-#define MII_OUI_TERANETICS 0x0014a6 /* Teranetics */
-#define MII_OUI_RALINK2 0x0017a5 /* Ralink Technology */
-#define MII_OUI_AQUANTIA 0x0017b6 /* Aquantia Corporation */
-#define MII_OUI_BROADCOM3 0x001be9 /* Broadcom Corporation */
-#define MII_OUI_LEVEL1 0x00207b /* Level 1 */
-#define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */
-#define MII_OUI_QUALSEMI 0x006051 /* Quality Semiconductor */
-#define MII_OUI_AMLOGIC 0x006051 /* Amlogic */
-#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */
-#define MII_OUI_SMSC 0x00800f /* SMSC */
-#define MII_OUI_SEEQ 0x00a07d /* Seeq */
-#define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */
-#define MII_OUI_INTEL 0x00aa00 /* Intel */
-#define MII_OUI_TSC 0x00c039 /* TDK Semiconductor */
-#define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */
-#define MII_OUI_ATTANSIC 0x00c82e /* Attansic Technology */
-#define MII_OUI_JMICRON 0x00d831 /* JMicron */
-#define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */
-#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */
-#define MII_OUI_REALTEK 0x00e04c /* RealTek */
-#define MII_OUI_ADMTEK 0x00e092 /* ADMtek */
-#define MII_OUI_XAQTI 0x00e0ae /* XaQti Corp. */
-#define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */
-#define MII_OUI_TI 0x080028 /* Texas Instruments */
-#define MII_OUI_BROADCOM4 0x18c086 /* Broadcom Corporation */
-#define MII_OUI_RENESAS 0x749050 /* Renesas */
+#define MII_OUI_AMD 0x00001a /* Advanced Micro Devices */
+#define MII_OUI_TRIDIUM 0x0001f0 /* Tridium */
+#define MII_OUI_DATATRACK 0x0002c6 /* Data Track Technology */
+#define MII_OUI_AGERE 0x00053d /* Agere */
+#define MII_OUI_QUAKE 0x000897 /* Quake Technologies */
+#define MII_OUI_BANKSPEED 0x0006b8 /* Bankspeed Pty */
+#define MII_OUI_NETEXCELL 0x0008bb /* NetExcell */
+#define MII_OUI_NETAS 0x0009c3 /* Netas */
+#define MII_OUI_BROADCOM2 0x000af7 /* Broadcom Corporation */
+#define MII_OUI_AELUROS 0x000b25 /* Aeluros */
+#define MII_OUI_RALINK 0x000c43 /* Ralink Technology */
+#define MII_OUI_ASIX 0x000ec6 /* ASIX */
+#define MII_OUI_BROADCOM 0x001018 /* Broadcom Corporation */
+#define MII_OUI_MICREL 0x0010a1 /* Micrel */
+#define MII_OUI_ALTIMA 0x0010a9 /* Altima Communications */
+#define MII_OUI_ENABLESEMI 0x0010dd /* Enable Semiconductor */
+#define MII_OUI_SUNPLUS 0x001105 /* Sunplus Technology */
+#define MII_OUI_TERANETICS 0x0014a6 /* Teranetics */
+#define MII_OUI_RALINK2 0x0017a5 /* Ralink Technology */
+#define MII_OUI_AQUANTIA 0x0017b6 /* Aquantia Corporation */
+#define MII_OUI_BROADCOM3 0x001be9 /* Broadcom Corporation */
+#define MII_OUI_LEVEL1 0x00207b /* Level 1 */
+#define MII_OUI_MARVELL 0x005043 /* Marvell Semiconductor */
+#define MII_OUI_QUALSEMI 0x006051 /* Quality Semiconductor */
+#define MII_OUI_AMLOGIC 0x006051 /* Amlogic */
+#define MII_OUI_DAVICOM 0x00606e /* Davicom Semiconductor */
+#define MII_OUI_SMSC 0x00800f /* SMSC */
+#define MII_OUI_SEEQ 0x00a07d /* Seeq */
+#define MII_OUI_ICS 0x00a0be /* Integrated Circuit Systems */
+#define MII_OUI_INTEL 0x00aa00 /* Intel */
+#define MII_OUI_TSC 0x00c039 /* TDK Semiconductor */
+#define MII_OUI_MYSON 0x00c0b4 /* Myson Technology */
+#define MII_OUI_ATTANSIC 0x00c82e /* Attansic Technology */
+#define MII_OUI_JMICRON 0x00d831 /* JMicron */
+#define MII_OUI_PMCSIERRA 0x00e004 /* PMC-Sierra */
+#define MII_OUI_SIS 0x00e006 /* Silicon Integrated Systems */
+#define MII_OUI_REALTEK 0x00e04c /* RealTek */
+#define MII_OUI_ADMTEK 0x00e092 /* ADMtek */
+#define MII_OUI_XAQTI 0x00e0ae /* XaQti Corp. */
+#define MII_OUI_NATSEMI 0x080017 /* National Semiconductor */
+#define MII_OUI_TI 0x080028 /* Texas Instruments */
+#define MII_OUI_BROADCOM4 0x18c086 /* Broadcom Corporation */
+#define MII_OUI_RENESAS 0x749050 /* Renesas */
/* Unregistered or wrong OUI */
-#define MII_OUI_yyREALTEK 0x000004 /* Realtek */
-#define MII_OUI_yyAMD 0x000058 /* Advanced Micro Devices */
-#define MII_OUI_xxVIA 0x0002c6 /* VIA Technologies */
-#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */
-#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */
-#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */
-#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */
-#define MII_OUI_xxAMLOGIC 0x00068a /* Amlogic */
-#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */
-#define MII_OUI_xxREALTEK 0x000732 /* Realtek */
-#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */
-#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
-#define MII_OUI_xxICPLUS 0x0009c3 /* IC Plus Corp. */
-#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
-#define MII_OUI_xxINTEL 0x001f00 /* Intel */
-#define MII_OUI_xxBROADCOM_ALT1 0x0050ef /* Broadcom Corporation */
-#define MII_OUI_yyINTEL 0x005500 /* Intel */
-#define MII_OUI_yyASIX 0x007063 /* Asix Semiconductor */
-#define MII_OUI_xxVITESSE 0x008083 /* Vitesse Semiconductor */
-#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */
-#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */
-#define MII_OUI_xxRDC 0x00d02d /* RDC Semiconductor */
-#define MII_OUI_xxNATSEMI 0x1000e8 /* National Semiconductor */
-#define MII_OUI_xxLEVEL1 0x782000 /* Level 1 */
-#define MII_OUI_xxXAQTI 0xace000 /* XaQti Corp. */
+#define MII_OUI_yyREALTEK 0x000004 /* Realtek */
+#define MII_OUI_yyAMD 0x000058 /* Advanced Micro Devices */
+#define MII_OUI_xxVIA 0x0002c6 /* VIA Technologies */
+#define MII_OUI_xxMYSON 0x00032d /* Myson Technology */
+#define MII_OUI_xxTSC 0x00039c /* TDK Semiconductor */
+#define MII_OUI_xxASIX 0x000674 /* Asix Semiconductor */
+#define MII_OUI_xxDAVICOM 0x000676 /* Davicom Semiconductor */
+#define MII_OUI_xxAMLOGIC 0x00068a /* Amlogic */
+#define MII_OUI_xxQUALSEMI 0x00068a /* Quality Semiconductor */
+#define MII_OUI_xxREALTEK 0x000732 /* Realtek */
+#define MII_OUI_xxBROADCOM 0x000818 /* Broadcom Corporation */
+#define MII_OUI_xxPMCSIERRA 0x0009c0 /* PMC-Sierra */
+#define MII_OUI_xxICPLUS 0x0009c3 /* IC Plus Corp. */
+#define MII_OUI_xxMARVELL 0x000ac2 /* Marvell Semiconductor */
+#define MII_OUI_xxINTEL 0x001f00 /* Intel */
+#define MII_OUI_xxBROADCOM_ALT1 0x0050ef /* Broadcom Corporation */
+#define MII_OUI_yyINTEL 0x005500 /* Intel */
+#define MII_OUI_yyASIX 0x007063 /* Asix Semiconductor */
+#define MII_OUI_xxVITESSE 0x008083 /* Vitesse Semiconductor */
+#define MII_OUI_xxPMCSIERRA2 0x009057 /* PMC-Sierra */
+#define MII_OUI_xxCICADA 0x00c08f /* Cicada Semiconductor */
+#define MII_OUI_xxRDC 0x00d02d /* RDC Semiconductor */
+#define MII_OUI_xxNATSEMI 0x1000e8 /* National Semiconductor */
+#define MII_OUI_xxLEVEL1 0x782000 /* Level 1 */
+#define MII_OUI_xxXAQTI 0xace000 /* XaQti Corp. */
/*
* List of known models. Grouped by oui.
@@ -134,525 +134,529 @@
/*
* Agere PHYs
*/
-#define MII_MODEL_AGERE_ET1011 0x0001
+#define MII_MODEL_AGERE_ET1011 0x0001 /* ET1011 10/100/1000baseT PHY */
#define MII_STR_AGERE_ET1011 "ET1011 10/100/1000baseT PHY"
-#define MII_MODEL_AGERE_ET1011C 0x0004
+#define MII_MODEL_AGERE_ET1011C 0x0004 /* ET1011C 10/100/1000baseT PHY */
#define MII_STR_AGERE_ET1011C "ET1011C 10/100/1000baseT PHY"
/* Asix semiconductor PHYs */
-#define MII_MODEL_xxASIX_AX88X9X 0x0031
+#define MII_MODEL_xxASIX_AX88X9X 0x0031 /* Ax88x9x internal PHY */
#define MII_STR_xxASIX_AX88X9X "Ax88x9x internal PHY"
-#define MII_MODEL_yyASIX_AX88772 0x0001
+#define MII_MODEL_yyASIX_AX88772 0x0001 /* AX88772 internal PHY */
#define MII_STR_yyASIX_AX88772 "AX88772 internal PHY"
-#define MII_MODEL_yyASIX_AX88772A 0x0006
+#define MII_MODEL_yyASIX_AX88772A 0x0006 /* AX88772A internal PHY */
#define MII_STR_yyASIX_AX88772A "AX88772A internal PHY"
-#define MII_MODEL_yyASIX_AX88772B 0x0008
+#define MII_MODEL_yyASIX_AX88772B 0x0008 /* AX88772B internal PHY */
#define MII_STR_yyASIX_AX88772B "AX88772B internal PHY"
/* Altima Communications PHYs */
/* Don't know the model for ACXXX */
-#define MII_MODEL_ALTIMA_ACXXX 0x0001
+#define MII_MODEL_ALTIMA_ACXXX 0x0001 /* ACXXX 10/100 media interface */
#define MII_STR_ALTIMA_ACXXX "ACXXX 10/100 media interface"
-#define MII_MODEL_ALTIMA_AC101L 0x0012
+#define MII_MODEL_ALTIMA_AC101L 0x0012 /* AC101L 10/100 media interface */
#define MII_STR_ALTIMA_AC101L "AC101L 10/100 media interface"
-#define MII_MODEL_ALTIMA_AC101 0x0021
+#define MII_MODEL_ALTIMA_AC101 0x0021 /* AC101 10/100 media interface */
#define MII_STR_ALTIMA_AC101 "AC101 10/100 media interface"
/* AMD Am79C87[45] have ALTIMA OUI */
-#define MII_MODEL_ALTIMA_Am79C875 0x0014
+#define MII_MODEL_ALTIMA_Am79C875 0x0014 /* Am79C875 10/100 media interface */
#define MII_STR_ALTIMA_Am79C875 "Am79C875 10/100 media interface"
-#define MII_MODEL_ALTIMA_Am79C874 0x0021
+#define MII_MODEL_ALTIMA_Am79C874 0x0021 /* Am79C874 10/100 media interface */
#define MII_STR_ALTIMA_Am79C874 "Am79C874 10/100 media interface"
/* Amlogic PHYs */
-#define MII_MODEL_AMLOGIC_GXL 0x0000
+#define MII_MODEL_AMLOGIC_GXL 0x0000 /* Meson GXL internal PHY */
#define MII_STR_AMLOGIC_GXL "Meson GXL internal PHY"
-#define MII_MODEL_xxAMLOGIC_GXL 0x0000
+#define MII_MODEL_xxAMLOGIC_GXL 0x0000 /* Meson GXL internal PHY */
#define MII_STR_xxAMLOGIC_GXL "Meson GXL internal PHY"
/* Attansic/Atheros PHYs */
-#define MII_MODEL_ATTANSIC_L1 0x0001
+#define MII_MODEL_ATTANSIC_L1 0x0001 /* L1 10/100/1000 PHY */
#define MII_STR_ATTANSIC_L1 "L1 10/100/1000 PHY"
-#define MII_MODEL_ATTANSIC_L2 0x0002
+#define MII_MODEL_ATTANSIC_L2 0x0002 /* L2 10/100 PHY */
#define MII_STR_ATTANSIC_L2 "L2 10/100 PHY"
-#define MII_MODEL_ATTANSIC_AR8021 0x0004
+#define MII_MODEL_ATTANSIC_AR8021 0x0004 /* Atheros AR8021 10/100/1000 PHY */
#define MII_STR_ATTANSIC_AR8021 "Atheros AR8021 10/100/1000 PHY"
-#define MII_MODEL_ATTANSIC_AR8035 0x0007
+#define MII_MODEL_ATTANSIC_AR8035 0x0007 /* Atheros AR8035 10/100/1000 PHY */
#define MII_STR_ATTANSIC_AR8035 "Atheros AR8035 10/100/1000 PHY"
/* Advanced Micro Devices PHYs */
/* see Davicom DM9101 for Am79C873 */
-#define MII_MODEL_yyAMD_79C972_10T 0x0001
+#define MII_MODEL_yyAMD_79C972_10T 0x0001 /* Am79C972 internal 10BASE-T interface */
#define MII_STR_yyAMD_79C972_10T "Am79C972 internal 10BASE-T interface"
-#define MII_MODEL_yyAMD_79c973phy 0x0036
+#define MII_MODEL_yyAMD_79c973phy 0x0036 /* Am79C973 internal 10/100 media interface */
#define MII_STR_yyAMD_79c973phy "Am79C973 internal 10/100 media interface"
-#define MII_MODEL_yyAMD_79c901 0x0037
+#define MII_MODEL_yyAMD_79c901 0x0037 /* Am79C901 10BASE-T interface */
#define MII_STR_yyAMD_79c901 "Am79C901 10BASE-T interface"
-#define MII_MODEL_yyAMD_79c901home 0x0039
+#define MII_MODEL_yyAMD_79c901home 0x0039 /* Am79C901 HomePNA 1.0 interface */
#define MII_STR_yyAMD_79c901home "Am79C901 HomePNA 1.0 interface"
/* Broadcom Corp. PHYs */
-#define MII_MODEL_xxBROADCOM_3C905B 0x0012
+#define MII_MODEL_xxBROADCOM_3C905B 0x0012 /* Broadcom 3c905B internal PHY */
#define MII_STR_xxBROADCOM_3C905B "Broadcom 3c905B internal PHY"
-#define MII_MODEL_xxBROADCOM_3C905C 0x0017
+#define MII_MODEL_xxBROADCOM_3C905C 0x0017 /* Broadcom 3c905C internal PHY */
#define MII_STR_xxBROADCOM_3C905C "Broadcom 3c905C internal PHY"
-#define MII_MODEL_xxBROADCOM_BCM5221 0x001e
+#define MII_MODEL_xxBROADCOM_BCM5221 0x001e /* BCM5221 10/100 media interface */
#define MII_STR_xxBROADCOM_BCM5221 "BCM5221 10/100 media interface"
-#define MII_MODEL_xxBROADCOM_BCM5201 0x0021
+#define MII_MODEL_xxBROADCOM_BCM5201 0x0021 /* BCM5201 10/100 media interface */
#define MII_STR_xxBROADCOM_BCM5201 "BCM5201 10/100 media interface"
-#define MII_MODEL_xxBROADCOM_BCM5214 0x0028
+#define MII_MODEL_xxBROADCOM_BCM5214 0x0028 /* BCM5214 Quad 10/100 media interface */
#define MII_STR_xxBROADCOM_BCM5214 "BCM5214 Quad 10/100 media interface"
-#define MII_MODEL_xxBROADCOM_BCM5222 0x0032
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