[src/trunk]: src/sys/arch/aarch64 changes of pmap.c r1.13 seems to be unstable.

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/a73b3202c236
branches:  trunk
changeset: 991705:a73b3202c236
user:      ryo <ryo%NetBSD.org@localhost>
date:      Fri Jul 27 07:04:04 2018 +0000

description:
changes of pmap.c r1.13 seems to be unstable.
In order to invalidate icache, not to invalidate all icache,
but temporary to make the page writable and invalidate target address only.

diffstat:

 sys/arch/aarch64/aarch64/pmap.c |  82 +++++++++++++++++++++++++++++------------
 sys/arch/aarch64/include/pmap.h |   5 ++-
 2 files changed, 62 insertions(+), 25 deletions(-)

diffs (135 lines):

diff -r b685f346fb5b -r a73b3202c236 sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c   Thu Jul 26 19:32:25 2018 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c   Fri Jul 27 07:04:04 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.14 2018/07/24 10:08:43 ryo Exp $    */
+/*     $NetBSD: pmap.c,v 1.15 2018/07/27 07:04:04 ryo Exp $    */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.14 2018/07/24 10:08:43 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.15 2018/07/27 07:04:04 ryo Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -1163,19 +1163,36 @@
 
                if (!executable && (prot & VM_PROT_EXECUTE)) {
                        /* non-exec -> exec */
-                       UVMHIST_LOG(pmaphist, "icache_sync: pm=%p, va=%016lx, pte: %016lx -> %016lx",
+                       UVMHIST_LOG(pmaphist, "icache_sync: "
+                           "pm=%p, va=%016lx, pte: %016lx -> %016lx",
                            pm, va, opte, pte);
-                       cpu_icache_sync_range(AARCH64_PA_TO_KVA(pa), PAGE_SIZE);
-                       cpu_icache_inv_all();   /* for VIPT/VIVT */
-               }
+                       if (!l3pte_writable(pte)) {
+                               /*
+                                * require write permission for cleaning dcache
+                                * (cpu_icache_sync_range)
+                                */
+                               pt_entry_t tpte;
 
-               atomic_swap_64(ptep, pte);
+                               tpte = pte & ~(LX_BLKPAG_AF|LX_BLKPAG_AP);
+                               tpte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RW);
+                               tpte |= (LX_BLKPAG_UXN|LX_BLKPAG_PXN);
+                               atomic_swap_64(ptep, tpte);
+                               aarch64_tlbi_by_va(va);
+
+                               cpu_icache_sync_range(va, PAGE_SIZE);
 
-#if 0
-               aarch64_tlbi_by_asid_va(pm->pm_asid, va);
-#else
-               aarch64_tlbi_by_va(va);
-#endif
+                               atomic_swap_64(ptep, pte);
+                               aarch64_tlbi_by_va(va);
+                       } else {
+                               atomic_swap_64(ptep, pte);
+                               aarch64_tlbi_by_va(va);
+
+                               cpu_icache_sync_range(va, PAGE_SIZE);
+                       }
+               } else {
+                       atomic_swap_64(ptep, pte);
+                       aarch64_tlbi_by_va(va);
+               }
        }
 
        pm_unlock(pm);
@@ -1481,21 +1498,38 @@
        pte = pa | attr;
 
        if (!executable && (prot & VM_PROT_EXECUTE)) {
-               UVMHIST_LOG(pmaphist, "icache_sync: pm=%p, va=%016lx, pte: %016lx -> %016lx",
+               /* non-exec -> exec */
+               UVMHIST_LOG(pmaphist,
+                   "icache_sync: pm=%p, va=%016lx, pte: %016lx -> %016lx",
                    pm, va, opte, pte);
-               /* non-exec -> exec */
-               cpu_icache_sync_range(AARCH64_PA_TO_KVA(pa), PAGE_SIZE);
-               cpu_icache_inv_all();   /* for VIPT/VIVT */
-       }
+               if (!l3pte_writable(pte)) {
+                       /*
+                        * require write permission for cleaning dcache
+                        * (cpu_icache_sync_range)
+                        */
+                       pt_entry_t tpte;
 
-       atomic_swap_64(ptep, pte);
+                       tpte = pte & ~(LX_BLKPAG_AF|LX_BLKPAG_AP);
+                       tpte |= (LX_BLKPAG_AF|LX_BLKPAG_AP_RW);
+                       tpte |= (LX_BLKPAG_UXN|LX_BLKPAG_PXN);
+                       atomic_swap_64(ptep, tpte);
+                       aarch64_tlbi_by_va(va);
+
+                       cpu_icache_sync_range(va, PAGE_SIZE);
+
+                       atomic_swap_64(ptep, pte);
+                       aarch64_tlbi_by_va(va);
 
-#if 0
-       /* didn't work??? */
-       aarch64_tlbi_by_asid_va(pm->pm_asid, va);
-#else
-       aarch64_tlbi_by_va(va);
-#endif
+               } else {
+                       atomic_swap_64(ptep, pte);
+                       aarch64_tlbi_by_va(va);
+
+                       cpu_icache_sync_range(va, PAGE_SIZE);
+               }
+       } else {
+               atomic_swap_64(ptep, pte);
+               aarch64_tlbi_by_va(va);
+       }
 
        if (pte & LX_BLKPAG_OS_WIRED)
                pm->pm_stats.wired_count++;
diff -r b685f346fb5b -r a73b3202c236 sys/arch/aarch64/include/pmap.h
--- a/sys/arch/aarch64/include/pmap.h   Thu Jul 26 19:32:25 2018 +0000
+++ b/sys/arch/aarch64/include/pmap.h   Fri Jul 27 07:04:04 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.5 2018/06/08 18:09:43 jmcneill Exp $ */
+/* $NetBSD: pmap.h,v 1.6 2018/07/27 07:04:04 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -97,6 +97,9 @@
 #define l3pte_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
 #define l3pte_executable(pde)  \
     (((pde) & (LX_BLKPAG_UXN|LX_BLKPAG_PXN)) != (LX_BLKPAG_UXN|LX_BLKPAG_PXN))
+#define l3pte_readable(pde)    ((pde) & LX_BLKPAG_AF)
+#define l3pte_writable(pde)    \
+    (((pde) & (LX_BLKPAG_AF|LX_BLKPAG_AP)) == (LX_BLKPAG_AF|LX_BLKPAG_AP_RW))
 #define l3pte_index(v)         (((vaddr_t)(v) & L3_ADDR_BITS) >> L3_SHIFT)
 #define l3pte_valid(pde)       (((pde) & LX_VALID) == LX_VALID)
 #define l3pte_is_page(pde)     (((pde) & LX_TYPE) == L3_TYPE_PAG)