[src/trunk]: src/sys/arch/arm/sunxi sunxi_gpio: set interrupt debounce filter...

[tnn <tnn%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/bdcfae220b02
branches:  trunk
changeset: 999486:bdcfae220b02
user:      tnn <tnn%NetBSD.org@localhost>
date:      Tue Jun 04 19:49:43 2019 +0000

description:
sunxi_gpio: set interrupt debounce filter to HOSC instead of LOSC

This improves gpio ISR response time from ~1.5ms to ~5us.

The hardware debounce filter is of limited value anyway because if we
at some point want to support interrupts from mechanical switches in
gpiobutton(4) it will still need a software debounce filter to be portable
to devices without hardware debouncing capability.

diffstat:

 sys/arch/arm/sunxi/sunxi_gpio.c |  10 ++++++++--
 1 files changed, 8 insertions(+), 2 deletions(-)

diffs (38 lines):

diff -r 6819f6ac8078 -r bdcfae220b02 sys/arch/arm/sunxi/sunxi_gpio.c
--- a/sys/arch/arm/sunxi/sunxi_gpio.c   Tue Jun 04 18:01:18 2019 +0000
+++ b/sys/arch/arm/sunxi/sunxi_gpio.c   Tue Jun 04 19:49:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_gpio.c,v 1.25 2019/05/30 18:19:36 tnn Exp $ */
+/* $NetBSD: sunxi_gpio.c,v 1.26 2019/06/04 19:49:43 tnn Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
 #include "opt_soc.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_gpio.c,v 1.25 2019/05/30 18:19:36 tnn Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_gpio.c,v 1.26 2019/06/04 19:49:43 tnn Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -72,6 +72,9 @@
 #define          SUNXI_GPIO_INT_MODE_DOUBLE_EDGE       0x4
 #define        SUNXI_GPIO_INT_CTL(bank)        (0x210 + 0x20 * (bank))
 #define        SUNXI_GPIO_INT_STATUS(bank)     (0x214 + 0x20 * (bank))
+#define        SUNXI_GPIO_INT_DEBOUNCE(bank)   (0x218 + 0x20 * (bank))
+#define          SUNXI_GPIO_INT_DEBOUNCE_CLK_PRESCALE  __BITS(6,4)
+#define          SUNXI_GPIO_INT_DEBOUNCE_CLK_SEL       __BIT(0)
 #define        SUNXI_GPIO_GRP_CONFIG(bank)     (0x300 + 0x4 * (bank))
 #define         SUNXI_GPIO_GRP_IO_BIAS_CONFIGMASK      0xf
 
@@ -480,6 +483,9 @@
        val |= __SHIFTIN(mode, SUNXI_GPIO_INT_MODEMASK(eint->eint_num));
        GPIO_WRITE(sc, SUNXI_GPIO_INT_CFG(eint->eint_bank, eint->eint_num), val);
 
+       val = SUNXI_GPIO_INT_DEBOUNCE_CLK_SEL;
+       GPIO_WRITE(sc, SUNXI_GPIO_INT_DEBOUNCE(eint->eint_bank), val);
+
        /* Enable eint */
        val = GPIO_READ(sc, SUNXI_GPIO_INT_CTL(eint->eint_bank));
        val |= __BIT(eint->eint_num);