[src/trunk]: src/sys/arch/x86/pci Add note about the case of PCI_MSI_MDATA[64...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/8fa95f4f57d6
branches:  trunk
changeset: 999766:8fa95f4f57d6
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Tue Jun 18 10:06:49 2019 +0000

description:
Add note about the case of PCI_MSI_MDATA[64] is 16bit.

diffstat:

 sys/arch/x86/pci/msipic.c |  13 +++++++++++--
 1 files changed, 11 insertions(+), 2 deletions(-)

diffs (34 lines):

diff -r 291b425e5b20 -r 8fa95f4f57d6 sys/arch/x86/pci/msipic.c
--- a/sys/arch/x86/pci/msipic.c Tue Jun 18 09:34:57 2019 +0000
+++ b/sys/arch/x86/pci/msipic.c Tue Jun 18 10:06:49 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: msipic.c,v 1.15 2019/06/17 06:38:29 msaitoh Exp $      */
+/*     $NetBSD: msipic.c,v 1.16 2019/06/18 10:06:49 msaitoh Exp $      */
 
 /*
  * Copyright (c) 2015 Internet Initiative Japan Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: msipic.c,v 1.15 2019/06/17 06:38:29 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: msipic.c,v 1.16 2019/06/18 10:06:49 msaitoh Exp $");
 
 #include "opt_intrdebug.h"
 
@@ -388,6 +388,15 @@
        data = __SHIFTIN(idt_vec, LAPIC_VECTOR_MASK)
                | LAPIC_TRIGMODE_EDGE | LAPIC_DLMODE_FIXED;
 
+       /*
+        * The size of the message data register is 16bit if the extended
+        * message data is not implemented. If it's 16bit and the per-vector
+        * masking is not capable, the location of the upper 16bit is out of
+        * the MSI capability structure's range. The PCI spec says the upper
+        * 16bit is driven to 0 if the message data register is 16bit. It's the
+        * spec, so it's OK just to write it regardless of the value of the
+        * upper 16bit.
+        */
        ctl = pci_conf_read(pc, tag, off + PCI_MSI_CTL);
        if (ctl & PCI_MSI_CTL_64BIT_ADDR) {
                pci_conf_write(pc, tag, off + PCI_MSI_MADDR64_LO, addr);