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[src/netbsd-9]: src/sys/arch Pull up following revision(s) (requested by jmcn...



details:   https://anonhg.NetBSD.org/src/rev/014380e0027c
branches:  netbsd-9
changeset: 1001337:014380e0027c
user:      martin <martin%NetBSD.org@localhost>
date:      Sun Dec 29 09:27:09 2019 +0000

description:
Pull up following revision(s) (requested by jmcneill in ticket #586):

        sys/arch/arm/nvidia/tegra_pcie.c: revision 1.27
        sys/arch/aarch64/aarch64/pmap.c: revision 1.57
        sys/arch/aarch64/aarch64/locore.S: revision 1.48
        sys/arch/aarch64/include/armreg.h: revision 1.29
        sys/arch/aarch64/aarch64/pmap.c: revision 1.58
        sys/arch/aarch64/aarch64/locore.S: revision 1.49
        sys/arch/arm/acpi/acpipchb.c: revision 1.14
        sys/arch/aarch64/aarch64/genassym.cf: revision 1.16
        sys/arch/arm/acpi/acpi_machdep.c: revision 1.13
        sys/arch/aarch64/include/pmap.h: revision 1.27
        sys/arch/aarch64/aarch64/genassym.cf: revision 1.17
        sys/arch/aarch64/include/pmap.h: revision 1.28
        sys/arch/arm/fdt/pcihost_fdtvar.h: revision 1.3
        sys/arch/arm/include/bus_defs.h: revision 1.14
        sys/arch/aarch64/aarch64/bus_space.c: revision 1.9
        sys/arch/arm/fdt/pcihost_fdt.c: revision 1.12
        sys/arch/aarch64/conf/files.aarch64: revision 1.15
        sys/arch/aarch64/conf/files.aarch64: revision 1.16
        sys/arch/arm/rockchip/rk3399_pcie.c: revision 1.9

Enable early write acknowledge for device memory mappings.

Do not use Early Write Acknowledge for PCIe I/O and config space.

diffstat:

 sys/arch/aarch64/aarch64/bus_space.c |   6 ++++--
 sys/arch/aarch64/aarch64/genassym.cf |   4 +++-
 sys/arch/aarch64/aarch64/locore.S    |  13 ++++++++++---
 sys/arch/aarch64/aarch64/pmap.c      |  11 +++++++----
 sys/arch/aarch64/conf/files.aarch64  |   3 ++-
 sys/arch/aarch64/include/armreg.h    |   3 ++-
 sys/arch/aarch64/include/pmap.h      |   8 ++++++--
 sys/arch/arm/acpi/acpi_machdep.c     |  20 +++++++++++++++++---
 sys/arch/arm/acpi/acpipchb.c         |  15 ++++++++++++---
 sys/arch/arm/fdt/pcihost_fdt.c       |  14 +++++++++++---
 sys/arch/arm/fdt/pcihost_fdtvar.h    |   4 +++-
 sys/arch/arm/include/bus_defs.h      |   9 ++++++++-
 sys/arch/arm/nvidia/tegra_pcie.c     |  11 ++++++-----
 sys/arch/arm/rockchip/rk3399_pcie.c  |   9 +++++----
 14 files changed, 96 insertions(+), 34 deletions(-)

diffs (truncated from 455 to 300 lines):

diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/aarch64/bus_space.c
--- a/sys/arch/aarch64/aarch64/bus_space.c      Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/aarch64/bus_space.c      Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.8 2019/01/27 02:08:36 pgoyette Exp $ */
+/* $NetBSD: bus_space.c,v 1.8.4.1 2019/12/29 09:27:09 martin Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.8 2019/01/27 02:08:36 pgoyette Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.8.4.1 2019/12/29 09:27:09 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -561,6 +561,8 @@
                pmapflags = PMAP_WRITE_COMBINE;
        else if ((flag & BUS_SPACE_MAP_CACHEABLE) != 0)
                pmapflags = PMAP_WRITE_BACK;
+       else if ((flag & _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED) != 0)
+               pmapflags = PMAP_DEV_SO;
        else
                pmapflags = PMAP_DEV;
 
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/aarch64/genassym.cf
--- a/sys/arch/aarch64/aarch64/genassym.cf      Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/aarch64/genassym.cf      Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.13 2019/07/13 09:47:14 skrll Exp $
+# $NetBSD: genassym.cf,v 1.13.2.1 2019/12/29 09:27:09 martin Exp $
 #-
 # Copyright (c) 2014 The NetBSD Foundation, Inc.
 # All rights reserved.
@@ -334,7 +334,9 @@
 define MAIR_ATTR1              MAIR_ATTR1
 define MAIR_ATTR2              MAIR_ATTR2
 define MAIR_ATTR3              MAIR_ATTR3
+define MAIR_ATTR4              MAIR_ATTR4
 define MAIR_DEVICE_nGnRnE      MAIR_DEVICE_nGnRnE
+define MAIR_DEVICE_nGnRE       MAIR_DEVICE_nGnRE
 define MAIR_NORMAL_NC          MAIR_NORMAL_NC
 define MAIR_NORMAL_WT          MAIR_NORMAL_WT
 define MAIR_NORMAL_WB          MAIR_NORMAL_WB
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.39.2.3 2019/12/09 16:08:57 martin Exp $   */
+/*     $NetBSD: locore.S,v 1.39.2.4 2019/12/29 09:27:09 martin Exp $   */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,8 +38,14 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.39.2.3 2019/12/09 16:08:57 martin Exp $")
+RCSID("$NetBSD: locore.S,v 1.39.2.4 2019/12/29 09:27:09 martin Exp $")
 
+#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
+#define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRnE
+#else
+#define        MAIR_DEVICE_MEM         MAIR_DEVICE_nGnRE
+#endif
+#define        MAIR_DEVICE_MEM_SO      MAIR_DEVICE_nGnRnE
 
 /*#define DEBUG_LOCORE                 /* debug print */
 /*#define DEBUG_LOCORE_PRINT_LOCK      /* avoid mixing AP's output */
@@ -944,7 +950,8 @@
            __SHIFTIN(MAIR_NORMAL_WB, MAIR_ATTR0) |     \
            __SHIFTIN(MAIR_NORMAL_NC, MAIR_ATTR1) |     \
            __SHIFTIN(MAIR_NORMAL_WT, MAIR_ATTR2) |     \
-           __SHIFTIN(MAIR_DEVICE_nGnRnE, MAIR_ATTR3))
+           __SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3) |    \
+           __SHIFTIN(MAIR_DEVICE_MEM_SO, MAIR_ATTR4))
 
 #define VIRT_BIT       48
 
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c   Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c   Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.41.2.3 2019/11/04 14:08:18 martin Exp $     */
+/*     $NetBSD: pmap.c,v 1.41.2.4 2019/12/29 09:27:09 martin Exp $     */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.3 2019/11/04 14:08:18 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41.2.4 2019/12/29 09:27:09 martin Exp $");
 
 #include "opt_arm_debug.h"
 #include "opt_ddb.h"
@@ -949,9 +949,12 @@
 
        pte &= ~LX_BLKPAG_ATTR_MASK;
 
-       switch (flags & (PMAP_CACHE_MASK|PMAP_DEV)) {
+       switch (flags & (PMAP_CACHE_MASK|PMAP_DEV_MASK)) {
+       case PMAP_DEV_SO ... PMAP_DEV_SO | PMAP_CACHE_MASK:
+               pte |= LX_BLKPAG_ATTR_DEVICE_MEM_SO;    /* Device-nGnRnE */
+               break;
        case PMAP_DEV ... PMAP_DEV | PMAP_CACHE_MASK:
-               pte |= LX_BLKPAG_ATTR_DEVICE_MEM;       /* nGnRnE */
+               pte |= LX_BLKPAG_ATTR_DEVICE_MEM;       /* Device-nGnRE */
                break;
        case PMAP_NOCACHE:
        case PMAP_NOCACHE_OVR:
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64       Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64       Sun Dec 29 09:27:09 2019 +0000
@@ -1,9 +1,10 @@
-#      $NetBSD: files.aarch64,v 1.13 2019/01/27 02:08:36 pgoyette Exp $
+#      $NetBSD: files.aarch64,v 1.13.4.1 2019/12/29 09:27:10 martin Exp $
 
 defflag opt_cpuoptions.h       AARCH64_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL0_STACK_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_EL1_STACK_ALIGNMENT_CHECK
 defflag opt_cpuoptions.h       AARCH64_HAVE_L2CTLR
+defflag opt_cpuoptions.h       AARCH64_DEVICE_MEM_STRONGLY_ORDERED
 
 defflag        opt_cputypes.h          CPU_ARMV8
 defflag        opt_cputypes.h          CPU_CORTEX: CPU_ARMV8
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/include/armreg.h
--- a/sys/arch/aarch64/include/armreg.h Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/include/armreg.h Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.25.2.1 2019/08/13 14:57:49 martin Exp $ */
+/* $NetBSD: armreg.h,v 1.25.2.2 2019/12/29 09:27:09 martin Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -522,6 +522,7 @@
 #define        MAIR_ATTR6               __BITS(55,48)
 #define        MAIR_ATTR7               __BITS(63,56)
 #define        MAIR_DEVICE_nGnRnE       0x00   // NoGathering,NoReordering,NoEarlyWriteAck.
+#define        MAIR_DEVICE_nGnRE        0x04   // NoGathering,NoReordering,EarlyWriteAck.
 #define        MAIR_NORMAL_NC           0x44
 #define        MAIR_NORMAL_WT           0xbb
 #define        MAIR_NORMAL_WB           0xff
diff -r da826f36a3d2 -r 014380e0027c sys/arch/aarch64/include/pmap.h
--- a/sys/arch/aarch64/include/pmap.h   Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/aarch64/include/pmap.h   Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.24.4.1 2019/11/04 14:08:18 martin Exp $ */
+/* $NetBSD: pmap.h,v 1.24.4.2 2019/12/29 09:27:09 martin Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -114,6 +114,7 @@
 #define LX_BLKPAG_ATTR_NORMAL_NC       __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_NORMAL_WT       __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_DEVICE_MEM      __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_DEVICE_MEM_SO   __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
 #define LX_BLKPAG_ATTR_MASK            LX_BLKPAG_ATTR_INDX
 
 #define lxpde_pa(pde)          ((paddr_t)((pde) & LX_TBL_PA))
@@ -228,6 +229,8 @@
 
 #define        PMAP_PTE                        0x10000000 /* kenter_pa */
 #define        PMAP_DEV                        0x20000000 /* kenter_pa */
+#define        PMAP_DEV_SO                     0x40000000 /* kenter_pa */
+#define        PMAP_DEV_MASK                   (PMAP_DEV | PMAP_DEV_SO)
 
 static inline u_int
 aarch64_mmap_flags(paddr_t mdpgno)
@@ -235,11 +238,12 @@
        u_int nflag, pflag;
 
        /*
-        * aarch64 arch has 4 memory attribute:
+        * aarch64 arch has 5 memory attribute:
         *
         *  WriteBack      - write back cache
         *  WriteThru      - wite through cache
         *  NoCache        - no cache
+        *  Device(nGnRE)  - no Gathering, no Reordering, Early write ack
         *  Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
         *
         * but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
diff -r da826f36a3d2 -r 014380e0027c sys/arch/arm/acpi/acpi_machdep.c
--- a/sys/arch/arm/acpi/acpi_machdep.c  Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/arm/acpi/acpi_machdep.c  Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.6.6.2 2019/08/12 17:32:09 martin Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.6.6.3 2019/12/29 09:27:10 martin Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
 #include "pci.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.6.6.2 2019/08/12 17:32:09 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.6.6.3 2019/12/29 09:27:10 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -313,13 +313,27 @@
        return AE_OK;
 }
 
+#if NPCI > 0
+static struct bus_space acpi_md_mcfg_bs_tag;
+
+static int
+acpi_md_mcfg_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
+    bus_space_handle_t *bshp)
+{
+       return arm_generic_bs_tag.bs_map(t, bpa, size,
+           flag | _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, bshp);
+}
+#endif
+
 void
 acpi_md_callback(struct acpi_softc *sc)
 {
        ACPI_TABLE_HEADER *hdrp;
 
 #if NPCI > 0
-       acpimcfg_init(&arm_generic_bs_tag, NULL);
+       acpi_md_mcfg_bs_tag = arm_generic_bs_tag;
+       acpi_md_mcfg_bs_tag.bs_map = acpi_md_mcfg_bs_map;
+       acpimcfg_init(&acpi_md_mcfg_bs_tag, NULL);
 #endif
 
        if (acpi_madt_map() != AE_OK)
diff -r da826f36a3d2 -r 014380e0027c sys/arch/arm/acpi/acpipchb.c
--- a/sys/arch/arm/acpi/acpipchb.c      Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/arm/acpi/acpipchb.c      Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.9.2.1 2019/10/15 19:37:58 martin Exp $ */
+/* $NetBSD: acpipchb.c,v 1.9.2.2 2019/12/29 09:27:10 martin Exp $ */
 
 /*-
  * Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.9.2.1 2019/10/15 19:37:58 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.9.2.2 2019/12/29 09:27:10 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -75,6 +75,8 @@
 
        int                     (*map)(void *, bus_addr_t, bus_size_t,
                                       int, bus_space_handle_t *);
+
+       int                     flags;
 };
 
 struct acpipchb_softc {
@@ -166,7 +168,8 @@
                return AE_NOT_FOUND;
        }
 
-       error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length, 0, &ap->ap_conf_bsh);
+       error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
+           _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
        if (error != 0)
                return AE_NO_MEMORY;
 
@@ -319,6 +322,11 @@
        if (size == 0)
                return ERANGE;
 
+       if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) {
+               /* Force strongly ordered mapping for all I/O space */
+               flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+       }
+
        for (i = 0; i < abs->nrange; i++) {
                struct acpipchb_bus_range * const range = &abs->range[i];
                if (bpa >= range->min && bpa + size - 1 <= range->max) 
@@ -387,6 +395,7 @@
                abs->bs = *sc->sc_memt;
                abs->bs.bs_cookie = abs;
                abs->map = abs->bs.bs_map;
+               abs->flags = pci_flags;
                abs->bs.bs_map = acpipchb_bus_space_map;
                if ((pci_flags & PCI_FLAGS_IO_OKAY) != 0)
                        pba->pba_iot = &abs->bs;
diff -r da826f36a3d2 -r 014380e0027c sys/arch/arm/fdt/pcihost_fdt.c
--- a/sys/arch/arm/fdt/pcihost_fdt.c    Fri Dec 27 06:59:45 2019 +0000
+++ b/sys/arch/arm/fdt/pcihost_fdt.c    Sun Dec 29 09:27:09 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcihost_fdt.c,v 1.11 2019/06/23 22:06:03 jmcneill Exp $ */
+/* $NetBSD: pcihost_fdt.c,v 1.11.2.1 2019/12/29 09:27:10 martin Exp $ */
 
 /*-
  * Copyright (c) 2018 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@



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