[src/netbsd-9]: src/sys/arch/mips/mips Pull up following revision(s) (request...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/dd14c2d9751e
branches:  netbsd-9
changeset: 1002363:dd14c2d9751e
user:      martin <martin%NetBSD.org@localhost>
date:      Sun Sep 05 10:48:48 2021 +0000

description:
Pull up following revision(s) (requested by tsutsui in ticket #1342):

        sys/arch/mips/mips/trap.c: revision 1.250
        sys/arch/mips/mips/trap.c: revision 1.251

Add missing newline to a diagnostic printf.

Comment out the diagnostic message in the TLB_MOD handler that's logged if
pmap_tlb_update_addr() indicates that the VA+ASID was not found in the TLB.

It's a harmless race condition that can happen for legitimate reasons (e.g.
a TLB miss in an interrupt handler that evicts the entry from the TLB).

See discussion:
    http://mail-index.netbsd.org/port-mips/2020/03/07/msg000927.html

diffstat:

 sys/arch/mips/mips/trap.c |  18 ++++++++++++++----
 1 files changed, 14 insertions(+), 4 deletions(-)

diffs (41 lines):

diff -r 1db7a183b3ba -r dd14c2d9751e sys/arch/mips/mips/trap.c
--- a/sys/arch/mips/mips/trap.c Fri Sep 03 10:28:29 2021 +0000
+++ b/sys/arch/mips/mips/trap.c Sun Sep 05 10:48:48 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: trap.c,v 1.249 2019/04/06 11:54:20 kamil Exp $ */
+/*     $NetBSD: trap.c,v 1.249.4.1 2021/09/05 10:48:48 martin Exp $    */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.249 2019/04/06 11:54:20 kamil Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.249.4.1 2021/09/05 10:48:48 martin Exp $");
 
 #include "opt_cputype.h"       /* which mips CPU levels do we support? */
 #include "opt_ddb.h"
@@ -296,10 +296,20 @@
                vaddr = trunc_page(vaddr);
                int ok = pmap_tlb_update_addr(pmap, vaddr, pte, 0);
                kpreempt_enable();
-               if (ok != 1)
+               if (ok != 1) {
+#if 0 /* PMAP_FAULTINFO? */
+                       /*
+                        * Since we don't block interrupts here,
+                        * this can legitimately happen if we get
+                        * a TLB miss that's serviced in an interrupt
+                        * hander that happens to randomly evict the
+                        * TLB entry we're concerned about.
+                        */
                        printf("pmap_tlb_update_addr(%p,%#"
-                           PRIxVADDR",%#"PRIxPTE", 0) returned %d",
+                           PRIxVADDR",%#"PRIxPTE", 0) returned %d\n",
                            pmap, vaddr, pte_value(pte), ok);
+#endif
+               }
                paddr_t pa = pte_to_paddr(pte);
                KASSERTMSG(uvm_pageismanaged(pa),
                    "%#"PRIxVADDR" pa %#"PRIxPADDR, vaddr, pa);