[src/trunk]: src/usr.sbin/cpuctl/arch - Add definitions of AMD's CPUID Fn8000...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/bec837769c2e
branches:  trunk
changeset: 1003864:bec837769c2e
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Oct 03 15:21:44 2019 +0000

description:
- Add definitions of AMD's CPUID Fn8000_001f Encrypted Memory features.
- Add definition of AMD's CPUID Fn8000_000a %edx bit 11 "GMET".
- Define CPUID_AMD_SVM_PFThreshold correctly.
- Modify comment a bit for consistency.

diffstat:

 sys/arch/x86/include/specialreg.h |  31 +++++++++++++++++++++++++------
 usr.sbin/cpuctl/arch/i386.c       |   9 +++++++--
 2 files changed, 32 insertions(+), 8 deletions(-)

diffs (108 lines):

diff -r fc4ddfd77d17 -r bec837769c2e sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Thu Oct 03 15:10:32 2019 +0000
+++ b/sys/arch/x86/include/specialreg.h Thu Oct 03 15:21:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.153 2019/09/26 06:42:52 msaitoh Exp $ */
+/*     $NetBSD: specialreg.h,v 1.154 2019/10/03 15:21:44 msaitoh Exp $ */
 
 /*
  * Copyright (c) 2014-2019 The NetBSD Foundation, Inc.
@@ -646,7 +646,7 @@
        "\31" "FXSR"    "\32" "FFXSR"   "\33" "P1GB"    "\34" "RDTSCP"  \
                        "\36" "LONG"    "\37" "3DNOW2"  "\40" "3DNOW"
 
-/* AMD Fn80000001 extended features - %ecx */
+/* AMD Fn8000_0001 extended features - %ecx */
 /*     CPUID_LAHF                         LAHF/SAHF instruction */
 #define CPUID_CMPLEGACY        0x00000002      /* Compare Legacy */
 #define CPUID_SVM      0x00000004      /* Secure Virtual Machine */
@@ -745,7 +745,7 @@
        "\21IBRS_ALWAYSON" "\22STIBP_ALWAYSON" "\23PREFER_IBRS" "\24B19" \
        "\31SSBD"       "\32VIRT_SSBD"  "\33SSB_NO"
 
-/* AMD Fn8000000a %edx features (SVM features) */
+/* AMD Fn8000_000a %edx features (SVM features) */
 #define CPUID_AMD_SVM_NP               0x00000001
 #define CPUID_AMD_SVM_LbrVirt          0x00000002
 #define CPUID_AMD_SVM_SVML             0x00000004
@@ -755,7 +755,8 @@
 #define CPUID_AMD_SVM_FlushByASID      0x00000040
 #define CPUID_AMD_SVM_DecodeAssist     0x00000080
 #define CPUID_AMD_SVM_PauseFilter      0x00000400
-#define CPUID_AMD_SVM_PFThreshold      0x0x001000 /* PAUSE filter threshold */
+#define CPUID_AMD_SVM_GMET             0x00000800
+#define CPUID_AMD_SVM_PFThreshold      0x00001000 /* PAUSE filter threshold */
 #define CPUID_AMD_SVM_AVIC             0x00002000 /* AMD Virtual intr. ctrl */
 #define CPUID_AMD_SVM_V_VMSAVE_VMLOAD  0x00008000 /* Virtual VM{SAVE/LOAD} */
 #define CPUID_AMD_SVM_vGIF             0x00010000 /* Virtualized GIF */
@@ -763,13 +764,13 @@
        "\1" "NP"       "\2" "LbrVirt"  "\3" "SVML"     "\4" "NRIPS"    \
        "\5" "TSCRate"  "\6" "VMCBCleanBits"                            \
                                "\7" "FlushByASID" "\10" "DecodeAssist" \
-       "\11" "B08"     "\12" "B09"     "\13" "PauseFilter" "\14" "B11" \
+       "\11" "B08"     "\12" "B09"     "\13" "PauseFilter" "\14" "GMET" \
        "\15" "PFThreshold" "\16" "AVIC" "\17" "B14"                    \
                                                "\20" "V_VMSAVE_VMLOAD" \
        "\21" "VGIF"
 
 /*
- * AMD Fn8000_0001d  Cache Topology Information.
+ * AMD Fn8000_0001d Cache Topology Information.
  * It's almost the same as Intel Deterministic Cache Parameter Leaf(0x04)
  * except the following:
  *     No Cores/package (%eax bit 31..26)
@@ -777,6 +778,24 @@
  */
 
 /*
+ * AMD Fn8000_0001f Encrypted Memory Capabilities.
+ * %eax: flags
+ * %ebx:  5-0: Cbit Position
+ *       11-6: PhysAddrReduction
+ * %ecx: 31-0: NumEncryptedGuests
+ * %edx: 31-0: MinSevNoEsAsid
+ */
+#define CPUID_AMD_ENCMEM_SME   __BIT(0)   /* Secure Memory Encryption */
+#define CPUID_AMD_ENCMEM_SEV   __BIT(1)   /* Secure Encrypted Virtualiz. */
+#define CPUID_AMD_ENCMEM_PGFLMSR __BIT(2)  /* Page Flush MSR */
+#define CPUID_AMD_ENCMEM_SEVES __BIT(3)   /* SEV Encrypted State */
+#define CPUID_AMD_ENCMEM_VTE   __BIT(16)  /* Virtual Transparent Encryption */
+
+#define CPUID_AMD_ENCMEM_FLAGS  "\20"                                        \
+       "\1" "NP"       "\2" "SEV"      "\3" "PageFlushMsr"     "\4" "SEV-ES" \
+       "\21" "VTE"
+
+/*
  * Centaur Extended Feature flags
  */
 #define CPUID_VIA_HAS_RNG      0x00000004      /* Random number generator */
diff -r fc4ddfd77d17 -r bec837769c2e usr.sbin/cpuctl/arch/i386.c
--- a/usr.sbin/cpuctl/arch/i386.c       Thu Oct 03 15:10:32 2019 +0000
+++ b/usr.sbin/cpuctl/arch/i386.c       Thu Oct 03 15:21:44 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i386.c,v 1.106 2019/09/09 05:36:21 msaitoh Exp $       */
+/*     $NetBSD: i386.c,v 1.107 2019/10/03 15:21:44 msaitoh Exp $       */
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
 
 #include <sys/cdefs.h>
 #ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.106 2019/09/09 05:36:21 msaitoh Exp $");
+__RCSID("$NetBSD: i386.c,v 1.107 2019/10/03 15:21:44 msaitoh Exp $");
 #endif /* not lint */
 
 #include <sys/types.h>
@@ -2312,6 +2312,11 @@
                        print_bits(cpuname, "SVM features",
                            CPUID_AMD_SVM_FLAGS, descs[3]);
                }
+               if (ci->ci_max_ext_cpuid >= 0x8000001f) {
+                       x86_cpuid(0x8000001f, descs);
+                       print_bits(cpuname, "Encrypted Memory features",
+                           CPUID_AMD_ENCMEM_FLAGS, descs[0]);
+               }
        } else if (cpu_vendor == CPUVENDOR_INTEL) {
                int32_t bi_index;