[src/trunk]: src/sys/arch/zaurus/stand/zbsdmod Fix another boot failure issue...

[tsutsui <tsutsui%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/1893b85f1adc
branches:  trunk
changeset: 1004353:1893b85f1adc
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Sat Oct 26 09:58:40 2019 +0000

description:
Fix another boot failure issue of NetBSD/zaurus 8.x and later.

It looks some cacheline alignment restriction so that zbsdmod.o in
NetBSD/zaurus 8.x release cannot jump to a loaded kernel properly.
Adding an explicit alingment pseudo op to put all instructions
between I-cache flush and jumping to the loaded kernel into the
same cacheline solves the issue.

See my post in port-zaurus@ for details:
 https://mail-index.netbsd.org/port-zaurus/2019/10/22/msg000069.html

Should be pulled up to netbsd-8 and netbsd-9.

diffstat:

 sys/arch/zaurus/stand/zbsdmod/zbsdmod.c |  9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diffs (23 lines):

diff -r 71917467e829 -r 1893b85f1adc sys/arch/zaurus/stand/zbsdmod/zbsdmod.c
--- a/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c   Sat Oct 26 09:49:13 2019 +0000
+++ b/sys/arch/zaurus/stand/zbsdmod/zbsdmod.c   Sat Oct 26 09:58:40 2019 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: zbsdmod.c,v 1.9 2013/12/02 18:36:11 joerg Exp $        */
+/*     $NetBSD: zbsdmod.c,v 1.10 2019/10/26 09:58:40 tsutsui Exp $     */
 /*     $OpenBSD: zbsdmod.c,v 1.7 2005/05/02 02:45:29 uwe Exp $ */
 
 /*
@@ -284,6 +284,13 @@
                "mov    r1, r1;"
                "sub    pc, pc, #4;"
                "mov    r1, #(0x00000010 | 0x00000020);"
+               /*
+                * Put the rest of instructions into the same cacheline
+                * to make sure no I$ refill after invalidation.
+                */
+               "b      2f;"
+               ".align 5;"
+               "2:"
                "mcr    p15, 0, r1, c1, c0, 0;" /* Write new control register */
                "mcr    p15, 0, r1, c8, c7, 0;" /* invalidate I+D TLB */
                "mcr    p15, 0, r1, c7, c5, 0;" /* invalidate I$ and BTB */