[src/trunk]: src/sys/dev/pci Use BUS_ADDR_{HI,LO}32().

[thorpej <thorpej%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9764f32f8b67
branches:  trunk
changeset: 1008009:9764f32f8b67
user:      thorpej <thorpej%NetBSD.org@localhost>
date:      Sun Mar 08 03:16:20 2020 +0000

description:
Use BUS_ADDR_{HI,LO}32().

diffstat:

 sys/dev/pci/if_cas.c |  23 +++++++++++++----------
 1 files changed, 13 insertions(+), 10 deletions(-)

diffs (55 lines):

diff -r 0172a9ab2fbd -r 9764f32f8b67 sys/dev/pci/if_cas.c
--- a/sys/dev/pci/if_cas.c      Sun Mar 08 02:44:12 2020 +0000
+++ b/sys/dev/pci/if_cas.c      Sun Mar 08 03:16:20 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_cas.c,v 1.41 2020/03/01 05:39:05 thorpej Exp $      */
+/*     $NetBSD: if_cas.c,v 1.42 2020/03/08 03:16:20 thorpej Exp $      */
 /*     $OpenBSD: if_cas.c,v 1.29 2009/11/29 16:19:38 kettenis Exp $    */
 
 /*
@@ -44,7 +44,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_cas.c,v 1.41 2020/03/01 05:39:05 thorpej Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_cas.c,v 1.42 2020/03/08 03:16:20 thorpej Exp $");
 
 #ifndef _MODULE
 #include "opt_inet.h"
@@ -1211,25 +1211,28 @@
        /* step 6 & 7. Program Descriptor Ring Base Addresses */
        KASSERT((CAS_CDTXADDR(sc, 0) & 0x1fff) == 0);
        bus_space_write_4(t, h, CAS_TX_RING_PTR_HI,
-           (((uint64_t)CAS_CDTXADDR(sc, 0)) >> 32));
-       bus_space_write_4(t, h, CAS_TX_RING_PTR_LO, CAS_CDTXADDR(sc, 0));
+           BUS_ADDR_HI32(CAS_CDTXADDR(sc, 0)));
+       bus_space_write_4(t, h, CAS_TX_RING_PTR_LO,
+           BUS_ADDR_LO32(CAS_CDTXADDR(sc, 0)));
 
        KASSERT((CAS_CDRXADDR(sc, 0) & 0x1fff) == 0);
        bus_space_write_4(t, h, CAS_RX_DRING_PTR_HI,
-           (((uint64_t)CAS_CDRXADDR(sc, 0)) >> 32));
-       bus_space_write_4(t, h, CAS_RX_DRING_PTR_LO, CAS_CDRXADDR(sc, 0));
+           BUS_ADDR_HI32(CAS_CDRXADDR(sc, 0)));
+       bus_space_write_4(t, h, CAS_RX_DRING_PTR_LO,
+           BUS_ADDR_LO32(CAS_CDRXADDR(sc, 0)));
 
        KASSERT((CAS_CDRXCADDR(sc, 0) & 0x1fff) == 0);
        bus_space_write_4(t, h, CAS_RX_CRING_PTR_HI,
-           (((uint64_t)CAS_CDRXCADDR(sc, 0)) >> 32));
-       bus_space_write_4(t, h, CAS_RX_CRING_PTR_LO, CAS_CDRXCADDR(sc, 0));
+           BUS_ADDR_HI32(CAS_CDRXCADDR(sc, 0)));
+       bus_space_write_4(t, h, CAS_RX_CRING_PTR_LO,
+           BUS_ADDR_LO32(CAS_CDRXCADDR(sc, 0)));
 
        if (CAS_PLUS(sc)) {
                KASSERT((CAS_CDRXADDR2(sc, 0) & 0x1fff) == 0);
                bus_space_write_4(t, h, CAS_RX_DRING_PTR_HI2,
-                   (((uint64_t)CAS_CDRXADDR2(sc, 0)) >> 32));
+                   BUS_ADDR_HI32(CAS_CDRXADDR2(sc, 0)));
                bus_space_write_4(t, h, CAS_RX_DRING_PTR_LO2,
-                   CAS_CDRXADDR2(sc, 0));
+                   BUS_ADDR_LO32(CAS_CDRXADDR2(sc, 0)));
        }
 
        /* step 8. Global Configuration & Interrupt Mask */