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[src/trunk]: src/sys/arch/aarch64 Determination of A64,A32,T32 for disasm is ...



details:   https://anonhg.NetBSD.org/src/rev/e056f034b1f3
branches:  trunk
changeset: 1011729:e056f034b1f3
user:      ryo <ryo%NetBSD.org@localhost>
date:      Wed Jul 08 03:45:13 2020 +0000

description:
Determination of A64,A32,T32 for disasm is now done in strrdisasm() instead of the caller.
correctly disassemble by processor state if defined DEBUG_DUMP_ON_USERFAULT or DEBUG_DDB_ON_USERFAULT.

diffstat:

 sys/arch/aarch64/aarch64/db_disasm.c    |  62 ++++++++++++++++++--------------
 sys/arch/aarch64/aarch64/fault.c        |  13 +++---
 sys/arch/aarch64/aarch64/kobj_machdep.c |   8 ++--
 sys/arch/aarch64/aarch64/trap.c         |  24 ++++++------
 sys/arch/aarch64/include/db_machdep.h   |   5 +-
 sys/arch/aarch64/include/machdep.h      |   3 +-
 6 files changed, 60 insertions(+), 55 deletions(-)

diffs (287 lines):

diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/aarch64/db_disasm.c
--- a/sys/arch/aarch64/aarch64/db_disasm.c      Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/aarch64/db_disasm.c      Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_disasm.c,v 1.8 2020/07/08 03:44:10 ryo Exp $ */
+/* $NetBSD: db_disasm.c,v 1.9 2020/07/08 03:45:13 ryo Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,11 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.8 2020/07/08 03:44:10 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.9 2020/07/08 03:45:13 ryo Exp $");
+
+#ifdef _KERNEL_OPT
+#include "opt_compat_netbsd32.h"
+#endif
 
 #include <sys/param.h>
 #include <machine/db_machdep.h>
@@ -38,6 +42,7 @@
 #include <ddb/db_user.h>
 
 #include <aarch64/cpufunc.h>
+#include <aarch64/machdep.h>
 #include <arch/aarch64/aarch64/disasm.h>
 
 static uint32_t
@@ -122,35 +127,36 @@
 };
 
 const char *
-strdisasm(vaddr_t pc)
+strdisasm(vaddr_t pc, uint64_t spsr)
 {
-       char *p;
-
-       strdisasm_ptr = strdisasm_buf;
-       disasm(&strdisasm_interface, (db_addr_t)pc);
+#ifdef COMPAT_NETBSD32
+       if (spsr & SPSR_A32) {
+               uint32_t insn = 0;
+               int size;
+               const char *arch = (spsr & SPSR_A32_T) ? "T32" : "A32";
 
-       /* replace tab to space, and chomp '\n' */
-       for (p = strdisasm_buf; *p != '\0'; p++) {
-               if (*p == '\t')
-                       *p = ' ';
+               size = fetch_arm_insn(pc, spsr, &insn);
+               if (size != 2)
+                       size = 4;
+               snprintf(strdisasm_buf, sizeof(strdisasm_buf),
+                   ".insn 0x%0*x (%s)", size * 2, insn, arch);
+       } else
+#endif /* COMPAT_NETBSD32 */
+       {
+               char *p;
+
+               /* disasm an aarch64 instruction */
+               strdisasm_ptr = strdisasm_buf;
+               disasm(&strdisasm_interface, (db_addr_t)pc);
+
+               /* replace tab to space, and chomp '\n' */
+               for (p = strdisasm_buf; *p != '\0'; p++) {
+                       if (*p == '\t')
+                               *p = ' ';
+               }
+               if ((p > strdisasm_buf) && (p[-1] == '\n'))
+                       p[-1] = '\0';
        }
-       if ((p > strdisasm_buf) && (p[-1] == '\n'))
-               p[-1] = '\0';
 
        return strdisasm_buf;
 }
-
-/*
- * disassemble aarch32 insns?
- */
-const char *
-strdisasm_aarch32(vaddr_t pc)
-{
-       uint32_t insn = *(uint32_t *)pc;
-
-       /* not supported any aarch32 insns yet... */
-       snprintf(strdisasm_buf, sizeof(strdisasm_buf), ".insn 0x%08x", insn);
-
-       return strdisasm_buf;
-}
-
diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/aarch64/fault.c
--- a/sys/arch/aarch64/aarch64/fault.c  Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/aarch64/fault.c  Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fault.c,v 1.13 2020/05/13 06:08:51 ryo Exp $   */
+/*     $NetBSD: fault.c,v 1.14 2020/07/08 03:45:13 ryo Exp $   */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.13 2020/05/13 06:08:51 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.14 2020/07/08 03:45:13 ryo Exp $");
 
 #include "opt_compat_netbsd32.h"
 #include "opt_ddb.h"
@@ -333,15 +333,14 @@
                /* fault address is pc. the causal instruction cannot be read */
                len += snprintf(panicinfo + len, sizeof(panicinfo) - len,
                    ": opcode unknown");
-       } else {
-               len += snprintf(panicinfo + len, sizeof(panicinfo) - len,
-                   ": opcode %08x", *(uint32_t *)tf->tf_pc);
+       }
 #ifdef DDB
+       else {
                /* ...and disassemble the instruction */
                len += snprintf(panicinfo + len, sizeof(panicinfo) - len,
-                   ": %s", strdisasm(tf->tf_pc));
+                   ": %s", strdisasm(tf->tf_pc, tf->tf_spsr));
+       }
 #endif
-       }
 
        if (user) {
 #if defined(DEBUG_DDB_ON_USERFAULT) && defined(DDB)
diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/aarch64/kobj_machdep.c
--- a/sys/arch/aarch64/aarch64/kobj_machdep.c   Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/aarch64/kobj_machdep.c   Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: kobj_machdep.c,v 1.3 2019/12/01 20:27:26 jmcneill Exp $        */
+/*     $NetBSD: kobj_machdep.c,v 1.4 2020/07/08 03:45:13 ryo Exp $     */
 
 /*
  * Copyright (c) 2018 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.3 2019/12/01 20:27:26 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: kobj_machdep.c,v 1.4 2020/07/08 03:45:13 ryo Exp $");
 
 #define ELFSIZE                ARCH_ELFSIZE
 
@@ -184,7 +184,7 @@
        old = *where;
 #ifdef DDB
        snprintf(disasmbuf, sizeof(disasmbuf), "%08x %s",
-           *insn, strdisasm((vaddr_t)insn));
+           *insn, strdisasm((vaddr_t)insn), 0);
 #endif
 #endif /* KOBJ_MACHDEP_DEBUG */
 
@@ -348,7 +348,7 @@
 #ifdef DDB
        printf("%s:    insn %s\n", __func__, disasmbuf);
        printf("%s:      -> %08x %s\n", __func__,
-           *insn, strdisasm((vaddr_t)insn));
+           *insn, strdisasm((vaddr_t)insn, 0));
 #endif
        printf("\n");
 #endif /* KOBJ_MACHDEP_DEBUG */
diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/aarch64/trap.c
--- a/sys/arch/aarch64/aarch64/trap.c   Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/aarch64/trap.c   Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: trap.c,v 1.30 2020/07/02 13:04:46 rin Exp $ */
+/* $NetBSD: trap.c,v 1.31 2020/07/08 03:45:13 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.30 2020/07/02 13:04:46 rin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.31 2020/07/08 03:45:13 ryo Exp $");
 
 #include "opt_arm_intr_impl.h"
 #include "opt_compat_netbsd32.h"
@@ -474,7 +474,7 @@
                            curlwp->l_proc->p_pid, curlwp->l_proc->p_comm,
                            l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1,
                            eclass_trapname(eclass), tf->tf_esr, tf->tf_pc,
-                           strdisasm(tf->tf_pc));
+                           strdisasm(tf->tf_pc, tf->tf_spsr));
                }
 #endif
                /* illegal or not implemented instruction */
@@ -518,16 +518,16 @@
  */
 #define THUMB_32BIT(hi) (((hi) & 0xe000) == 0xe000 && ((hi) & 0x1800))
 
-static int
-fetch_arm_insn(struct trapframe *tf, uint32_t *insn)
+int
+fetch_arm_insn(uint64_t pc, uint64_t spsr, uint32_t *insn)
 {
 
        /* THUMB? */
-       if (tf->tf_spsr & SPSR_A32_T) {
-               uint16_t *pc = (uint16_t *)(tf->tf_pc & ~1UL); /* XXX */
+       if (spsr & SPSR_A32_T) {
+               uint16_t *p = (uint16_t *)(pc & ~1UL); /* XXX */
                uint16_t hi, lo;
 
-               if (ufetch_16(pc, &hi))
+               if (ufetch_16(p, &hi))
                        return -1;
 
                if (!THUMB_32BIT(hi)) {
@@ -537,14 +537,14 @@
                }
 
                /* 32-bit Thumb instruction */
-               if (ufetch_16(pc + 1, &lo))
+               if (ufetch_16(p + 1, &lo))
                        return -1;
 
                *insn = ((uint32_t)hi << 16) | lo;
                return 4;
        }
 
-       if (ufetch_32((uint32_t *)tf->tf_pc, insn))
+       if (ufetch_32((uint32_t *)pc, insn))
                return -1;
 
        return 4;
@@ -557,7 +557,7 @@
        uint32_t insn;
        int insn_size;
 
-       insn_size = fetch_arm_insn(tf, &insn);
+       insn_size = fetch_arm_insn(tf->tf_pc, tf->tf_spsr, &insn);
 
        switch (insn_size) {
        case 2:
@@ -707,7 +707,7 @@
                            curlwp->l_proc->p_pid, curlwp->l_proc->p_comm,
                            l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1,
                            eclass_trapname(eclass), tf->tf_esr, tf->tf_pc,
-                           strdisasm_aarch32(tf->tf_pc));
+                           strdisasm(tf->tf_pc, tf->tf_spsr));
                }
 #endif
                /* illegal or not implemented instruction */
diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/include/db_machdep.h
--- a/sys/arch/aarch64/include/db_machdep.h     Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/include/db_machdep.h     Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.9 2020/05/22 19:29:26 ryo Exp $ */
+/* $NetBSD: db_machdep.h,v 1.10 2020/07/08 03:45:13 ryo Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -203,8 +203,7 @@
 #define DB_MACHINE_COMMANDS
 void dump_trapframe(struct trapframe *, void (*)(const char *, ...));
 void dump_switchframe(struct trapframe *, void (*)(const char *, ...));
-const char *strdisasm(vaddr_t);
-const char *strdisasm_aarch32(vaddr_t);
+const char *strdisasm(vaddr_t, uint64_t);
 void db_machdep_init(void);
 
 /* hardware breakpoint/watchpoint functions */
diff -r e1aa6d6a43cd -r e056f034b1f3 sys/arch/aarch64/include/machdep.h
--- a/sys/arch/aarch64/include/machdep.h        Wed Jul 08 03:44:10 2020 +0000
+++ b/sys/arch/aarch64/include/machdep.h        Wed Jul 08 03:45:13 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.h,v 1.13 2020/07/01 08:01:07 ryo Exp $ */
+/*     $NetBSD: machdep.h,v 1.14 2020/07/08 03:45:13 ryo Exp $ */
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -93,6 +93,7 @@
 void cpu_dosoftints(void);
 void cpu_switchto_softint(struct lwp *, int);
 void dosoftints(void);
+int fetch_arm_insn(uint64_t, uint64_t, uint32_t *);
 void trap_doast(struct trapframe *);
 
 void trap_el1t_sync(struct trapframe *);



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