[src/trunk]: src Copy "mach reset" logic from arm32 recently added by jmcneil...

[simonb <simonb%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/10303b8ff12b
branches:  trunk
changeset: 1011820:10303b8ff12b
user:      simonb <simonb%NetBSD.org@localhost>
date:      Mon Jul 13 05:20:45 2020 +0000

description:
Copy "mach reset" logic from arm32 recently added by jmcneill@.  The
previous MIPS "mach reset" DDB command was hard-coded for Octeon Cavium
CPUs only.

diffstat:

 share/man/man4/ddb.4               |   6 ++++--
 sys/arch/evbmips/cavium/machdep.c  |   6 ++++--
 sys/arch/mips/include/db_machdep.h |   4 +++-
 sys/arch/mips/mips/db_interface.c  |  19 +++++++++++--------
 sys/arch/mips/mips/mips_machdep.c  |   8 +++++---
 5 files changed, 27 insertions(+), 16 deletions(-)

diffs (158 lines):

diff -r 09f58c9b4b93 -r 10303b8ff12b share/man/man4/ddb.4
--- a/share/man/man4/ddb.4      Mon Jul 13 04:44:03 2020 +0000
+++ b/share/man/man4/ddb.4      Mon Jul 13 05:20:45 2020 +0000
@@ -1,4 +1,4 @@
-.\"    $NetBSD: ddb.4,v 1.190 2020/07/02 11:10:47 jmcneill Exp $
+.\"    $NetBSD: ddb.4,v 1.191 2020/07/13 05:20:45 simonb Exp $
 .\"
 .\" Copyright (c) 1997 - 2019 The NetBSD Foundation, Inc.
 .\" All rights reserved.
@@ -56,7 +56,7 @@
 .\" any improvements or extensions that they make and grant Carnegie Mellon
 .\" the rights to redistribute these changes.
 .\"
-.Dd July 2, 2020
+.Dd July 13, 2020
 .Dt DDB 4
 .Os
 .Sh NAME
@@ -1093,6 +1093,8 @@
 Dump CP0 (coprocessor 0) register values.
 .It Ic kvtop
 Print the physical address for a given kernel virtual address.
+.It Ic reset
+Reset the system.  Not implemented for many CPUs and/or systems.
 .It Ic tlb
 Print out the Translation Lookaside Buffer (TLB).
 Only works in
diff -r 09f58c9b4b93 -r 10303b8ff12b sys/arch/evbmips/cavium/machdep.c
--- a/sys/arch/evbmips/cavium/machdep.c Mon Jul 13 04:44:03 2020 +0000
+++ b/sys/arch/evbmips/cavium/machdep.c Mon Jul 13 05:20:45 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.16 2020/06/20 02:27:55 simonb Exp $      */
+/*     $NetBSD: machdep.c,v 1.17 2020/07/13 05:20:45 simonb Exp $      */
 
 /*
  * Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -114,7 +114,7 @@
 #include "opt_multiprocessor.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.16 2020/06/20 02:27:55 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.17 2020/07/13 05:20:45 simonb Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -196,6 +196,8 @@
        /* clear the BSS segment */
        memset(edata, 0, end - edata);
 
+       cpu_reset_address = octeon_soft_reset;
+
        KASSERT(MIPS_XKPHYS_P(arg3));
        btinfo_paddr = mips3_ld(arg3 + OCTEON_BTINFO_PADDR_OFFSET);
 
diff -r 09f58c9b4b93 -r 10303b8ff12b sys/arch/mips/include/db_machdep.h
--- a/sys/arch/mips/include/db_machdep.h        Mon Jul 13 04:44:03 2020 +0000
+++ b/sys/arch/mips/include/db_machdep.h        Mon Jul 13 05:20:45 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: db_machdep.h,v 1.30 2017/11/06 03:47:47 christos Exp $ */
+/* $NetBSD: db_machdep.h,v 1.31 2020/07/13 05:20:45 simonb Exp $ */
 
 /*
  * Copyright (c) 1997 Jonathan Stone (hereinafter referred to as the author)
@@ -124,6 +124,8 @@
 bool ddb_running_on_any_cpu_p(void);
 void db_resume_others(void);
 
+extern void (*cpu_reset_address)(void);
+
 /*
  * We have machine-dependent commands.
  */
diff -r 09f58c9b4b93 -r 10303b8ff12b sys/arch/mips/mips/db_interface.c
--- a/sys/arch/mips/mips/db_interface.c Mon Jul 13 04:44:03 2020 +0000
+++ b/sys/arch/mips/mips/db_interface.c Mon Jul 13 05:20:45 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: db_interface.c,v 1.83 2020/06/14 06:50:31 simonb Exp $ */
+/*     $NetBSD: db_interface.c,v 1.84 2020/07/13 05:20:45 simonb Exp $ */
 
 /*
  * Mach Operating System
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.83 2020/06/14 06:50:31 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_interface.c,v 1.84 2020/07/13 05:20:45 simonb Exp $");
 
 #include "opt_multiprocessor.h"
 #include "opt_cputype.h"       /* which mips CPUs do we support? */
@@ -771,8 +771,13 @@
 db_mach_reset_cmd(db_expr_t addr, bool have_addr, db_expr_t count,
                const char *modif)
 {
-       mips3_sd(MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_SOFT_RST),
-            mips3_ld(MIPS_PHYS_TO_XKPHYS_UNCACHED(CIU_FUSE)));
+
+       if (cpu_reset_address == NULL) {
+               db_printf("cpu_reset_address is not set\n");
+               return;
+       }
+
+       cpu_reset_address();
 }
 
 #endif
@@ -807,16 +812,14 @@
                "Set processor control register",
                NULL, NULL) },
 #endif
-#ifdef MIPS64_OCTEON
-#ifdef MULTIPROCESSOR
+#if defined(MIPS64_OCTEON) && defined(MULTIPROCESSOR)
        { DDB_ADD_CMD("nmi",    db_mach_nmi_cmd,        CS_NOREPEAT,
                "Send NMI to processor",
                "cpu#", NULL) },
-#endif
+#endif /* OCTEON + MP */
        { DDB_ADD_CMD("reset",  db_mach_reset_cmd,      CS_NOREPEAT,
                "Initiate hardware reset",
                NULL, NULL) },
-#endif
        { DDB_ADD_CMD(NULL,     NULL,               0,  NULL,NULL,NULL) }
 };
 #endif /* !KGDB */
diff -r 09f58c9b4b93 -r 10303b8ff12b sys/arch/mips/mips/mips_machdep.c
--- a/sys/arch/mips/mips/mips_machdep.c Mon Jul 13 04:44:03 2020 +0000
+++ b/sys/arch/mips/mips/mips_machdep.c Mon Jul 13 05:20:45 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips_machdep.c,v 1.294 2020/06/28 13:33:06 simonb Exp $        */
+/*     $NetBSD: mips_machdep.c,v 1.295 2020/07/13 05:20:45 simonb Exp $        */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -111,7 +111,7 @@
  */
 
 #include <sys/cdefs.h>                 /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.294 2020/06/28 13:33:06 simonb Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_machdep.c,v 1.295 2020/07/13 05:20:45 simonb Exp $");
 
 #define __INTR_PRIVATE
 #include "opt_cputype.h"
@@ -267,11 +267,13 @@
 
 void * msgbufaddr;
 
+/* the following is used by DDB to reset the system */
+void   (*cpu_reset_address)(void);
+
 /* the following is used externally (sysctl_hw) */
 char   machine[] = MACHINE;            /* from <machine/param.h> */
 char   machine_arch[] = MACHINE_ARCH;  /* from <machine/param.h> */
 
-
 /*
  * Assumptions:
  *  - All MIPS3+ have an r4k-style MMU.  _Many_ assumptions throughout