[src/trunk]: src/sys/arch Start teaching sh3 code about STX7105.

[uwe <uwe%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/526d494709ab
branches:  trunk
changeset: 1012207:526d494709ab
user:      uwe <uwe%NetBSD.org@localhost>
date:      Sat Jul 25 23:38:48 2020 +0000

description:
Start teaching sh3 code about STX7105.

Kernel option STX7105 to select CPU product (TODO: all of the options
that select CPU product should be defflag'ed to opt_cputype.h).

The ST40 cache sizes can be customized for each product.  For now just
hardcode the STx7105 values in the switch, but may be they should be
kernel options.

diffstat:

 sys/arch/evbsh3/conf/std.nextvod |   4 ++--
 sys/arch/evbsh3/evbsh3/machdep.c |   6 ++++--
 sys/arch/sh3/sh3/cache_sh4.c     |  15 +++++++++++++--
 3 files changed, 19 insertions(+), 6 deletions(-)

diffs (81 lines):

diff -r 935950ca634f -r 526d494709ab sys/arch/evbsh3/conf/std.nextvod
--- a/sys/arch/evbsh3/conf/std.nextvod  Sat Jul 25 23:05:40 2020 +0000
+++ b/sys/arch/evbsh3/conf/std.nextvod  Sat Jul 25 23:38:48 2020 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: std.nextvod,v 1.1 2020/07/19 23:44:36 uwe Exp $
+# $NetBSD: std.nextvod,v 1.2 2020/07/25 23:38:48 uwe Exp $
 
 include "arch/evbsh3/conf/std.evbsh3.el"
 include "arch/evbsh3/conf/files.nextvod"
@@ -9,7 +9,7 @@
 
 # CPU support
 options        SH4
-options        SH7751R         # a white lie to get it to compile
+options        STX7105
 options        DONT_INIT_BSC
 
 options        IOM_RAM_BEGIN=0x00000000        # NB: physical address
diff -r 935950ca634f -r 526d494709ab sys/arch/evbsh3/evbsh3/machdep.c
--- a/sys/arch/evbsh3/evbsh3/machdep.c  Sat Jul 25 23:05:40 2020 +0000
+++ b/sys/arch/evbsh3/evbsh3/machdep.c  Sat Jul 25 23:38:48 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.75 2014/06/19 13:20:13 msaitoh Exp $     */
+/*     $NetBSD: machdep.c,v 1.76 2020/07/25 23:38:48 uwe Exp $ */
 
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.75 2014/06/19 13:20:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.76 2020/07/25 23:38:48 uwe Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -286,6 +286,8 @@
        sh_cpu_init(CPU_ARCH_SH4, CPU_PRODUCT_7751);
 #elif defined(SH7751R)
        sh_cpu_init(CPU_ARCH_SH4, CPU_PRODUCT_7751R);
+#elif defined(STX7105)
+       sh_cpu_init(CPU_ARCH_SH4, CPU_PRODUCT_STX7105);
 #else
 #error "unsupported SH4 variants"
 #endif
diff -r 935950ca634f -r 526d494709ab sys/arch/sh3/sh3/cache_sh4.c
--- a/sys/arch/sh3/sh3/cache_sh4.c      Sat Jul 25 23:05:40 2020 +0000
+++ b/sys/arch/sh3/sh3/cache_sh4.c      Sat Jul 25 23:38:48 2020 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_sh4.c,v 1.24 2013/05/14 14:11:43 tsutsui Exp $   */
+/*     $NetBSD: cache_sh4.c,v 1.25 2020/07/25 23:38:48 uwe Exp $       */
 
 /*-
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache_sh4.c,v 1.24 2013/05/14 14:11:43 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache_sh4.c,v 1.25 2020/07/25 23:38:48 uwe Exp $");
 
 #include "opt_cache.h"
 
@@ -104,6 +104,17 @@
                r = SH4_CCR_EMODE|SH4_CCR_ICE|SH4_CCR_OCE|SH4_CCR_WT;
                break;
 #endif
+
+       /*
+        * The ST40 cache sizes can be customized for each product.
+        * Refer to product-specific documentation for the cache sizes.
+        */
+       case CPU_PRODUCT_STX7105:
+               icache_size = 32 * 1024;
+               dcache_size = 32 * 1024;
+               ways = 2;
+               r = SH4_CCR_EMODE|SH4_CCR_ICE|SH4_CCR_OCE|SH4_CCR_WT;
+               break;
        }
 #if defined(SH4_CACHE_DISABLE_ICACHE)
        r &= ~SH4_CCR_ICE;