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[src/trunk]: src/sys/arch/mips Use a 16kB USPACE (and larger kernel stack) fo...
details: https://anonhg.NetBSD.org/src/rev/f114940bdef6
branches: trunk
changeset: 1013235:f114940bdef6
user: simonb <simonb%NetBSD.org@localhost>
date: Sun Aug 23 10:23:38 2020 +0000
description:
Use a 16kB USPACE (and larger kernel stack) for LP64 kernels. Invert
the logic for setting the USPACE size. Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.
Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process. Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.
diffstat:
sys/arch/mips/include/mips_param.h | 16 +++++++++++-----
sys/arch/mips/include/proc.h | 4 ++--
sys/arch/mips/mips/mipsX_subr.S | 13 ++++++++-----
sys/arch/mips/mips/vm_machdep.c | 9 ++-------
4 files changed, 23 insertions(+), 19 deletions(-)
diffs (117 lines):
diff -r 496a61869832 -r f114940bdef6 sys/arch/mips/include/mips_param.h
--- a/sys/arch/mips/include/mips_param.h Sun Aug 23 09:55:58 2020 +0000
+++ b/sys/arch/mips/include/mips_param.h Sun Aug 23 10:23:38 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_param.h,v 1.45 2020/07/26 08:08:41 simonb Exp $ */
+/* $NetBSD: mips_param.h,v 1.46 2020/08/23 10:23:38 simonb Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -117,12 +117,18 @@
#endif
#define NSEGPG (1 << SEGLENGTH)
-#if PGSHIFT >= 13
-#define UPAGES 1 /* pages of u-area */
+#ifdef _LP64
+#define __MIN_USPACE 16384 /* LP64 needs a 16kB stack */
#else
-#define UPAGES 2 /* pages of u-area */
+/*
+ * Note for the non-LP64 case, cpu_switch_resume has the assumption
+ * that UPAGES == 2. For MIPS-I we wire USPACE in TLB #0 and #1.
+ * For MIPS3+ we wire USPACE in the the TLB #0 pair.
+ */
+#define __MIN_USPACE 8192 /* otherwise use an 8kB stack */
#endif
-#define USPACE (UPAGES*NBPG) /* size of u-area in bytes */
+#define USPACE MAX(__MIN_USPACE, PAGE_SIZE)
+#define UPAGES (USPACE / PAGE_SIZE) /* number of pages for u-area */
#define USPACE_ALIGN USPACE /* make sure it starts on a even VA */
/*
diff -r 496a61869832 -r f114940bdef6 sys/arch/mips/include/proc.h
--- a/sys/arch/mips/include/proc.h Sun Aug 23 09:55:58 2020 +0000
+++ b/sys/arch/mips/include/proc.h Sun Aug 23 10:23:38 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: proc.h,v 1.29 2020/07/26 08:08:41 simonb Exp $ */
+/* $NetBSD: proc.h,v 1.30 2020/08/23 10:23:38 simonb Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -52,7 +52,7 @@
vaddr_t md_ss_addr; /* single step address for ptrace */
int md_ss_instr; /* single step instruction for ptrace */
volatile int md_astpending; /* AST pending on return to userland */
- int md_upte[2]; /* ptes for mapping u page */
+ int md_upte[UPAGES]; /* ptes for mapping u page */
};
struct mdproc {
diff -r 496a61869832 -r f114940bdef6 sys/arch/mips/mips/mipsX_subr.S
--- a/sys/arch/mips/mips/mipsX_subr.S Sun Aug 23 09:55:58 2020 +0000
+++ b/sys/arch/mips/mips/mipsX_subr.S Sun Aug 23 10:23:38 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mipsX_subr.S,v 1.108 2020/06/13 12:53:42 simonb Exp $ */
+/* $NetBSD: mipsX_subr.S,v 1.109 2020/08/23 10:23:38 simonb Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -2707,12 +2707,14 @@
* Disable the optimisation for PGSHIFT == 14 (aka ENABLE_MIPS_16KB_PAGE)
* as the code needs fixing for this case
*
- * _LP64 with UPAGES == 1 is always direct mappable; everything else can have
- * non-direct mappable USPACE.
+ * A TLB entry isn't used for the following cases:
+ * - 16kB USPACE
+ * - LP64 - USPACE is always accessed directly via XKPHYS
*/
LEAF_NOPROFILE(MIPSX(cpu_switch_resume))
-#if (PGSHIFT < 14)
+#if !defined(_LP64)
+#if (PAGE_SIZE < 16384)
#if (USPACE > PAGE_SIZE) || !defined(_LP64)
INT_L a1, L_MD_UPTE_0(a0) # a1 = upte[0]
#if (PGSHIFT & 1)
@@ -2789,7 +2791,8 @@
COP0_SYNC
MIPSX(resume):
#endif /* (USPACE > PAGE_SIZE) || !defined(_LP64) */
-#endif /* PGSHIFT < 14 */
+#endif /* PAGE_SIZE < 16384 */
+#endif /* ! LP64 */
#ifdef MIPSNNR2
PTR_L v0, L_PRIVATE(a0) # get lwp private
_MTC0 v0, MIPS_COP_0_USERLOCAL # make available for rdhwr
diff -r 496a61869832 -r f114940bdef6 sys/arch/mips/mips/vm_machdep.c
--- a/sys/arch/mips/mips/vm_machdep.c Sun Aug 23 09:55:58 2020 +0000
+++ b/sys/arch/mips/mips/vm_machdep.c Sun Aug 23 10:23:38 2020 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vm_machdep.c,v 1.161 2020/08/09 07:09:35 skrll Exp $ */
+/* $NetBSD: vm_machdep.c,v 1.162 2020/08/23 10:23:38 simonb Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.161 2020/08/09 07:09:35 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.162 2020/08/23 10:23:38 simonb Exp $");
#include "opt_ddb.h"
#include "opt_cputype.h"
@@ -120,11 +120,6 @@
l2->l_md.md_upte[i] = 0;
}
if (!pmap_md_direct_mapped_vaddr_p(ua2)) {
- /*
- * UPAGES has to be 2 for 4KB PAGE_SIZE
- * UPAGES has to be 1 for >= 8KB PAGE_SIZE
- */
- CTASSERT((PGSHIFT == 12) == (UPAGES == 2));
pt_entry_t * const pte = pmap_pte_lookup(pmap_kernel(), ua2);
const uint32_t x = MIPS_HAS_R4K_MMU
? (MIPS3_PG_RO | MIPS3_PG_WIRED)
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