[src/trunk]: src/sys/lib/libunwind PR toolchain/55837

[rin <rin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4f4a1ee67e2f
branches:  trunk
changeset: 1021460:4f4a1ee67e2f
user:      rin <rin%NetBSD.org@localhost>
date:      Mon May 31 11:41:22 2021 +0000

description:
PR toolchain/55837

Misc style fixes for clarity:

- Rename lazyVFP1() and lazyVFP3() to lazyVFPv2() and lazyVFPv3(),
  respectively. Note that VFPv1 was obsoleted and replaced by VFPv2.

- Introduce enum for flags.

- Add few comments.

No functional changes.

diffstat:

 sys/lib/libunwind/Registers.hpp      |  30 +++++++++++++++++-------------
 sys/lib/libunwind/unwind_registers.S |  24 ++++++++++++------------
 2 files changed, 29 insertions(+), 25 deletions(-)

diffs (121 lines):

diff -r 10ebd06d52ed -r 4f4a1ee67e2f sys/lib/libunwind/Registers.hpp
--- a/sys/lib/libunwind/Registers.hpp   Mon May 31 11:12:42 2021 +0000
+++ b/sys/lib/libunwind/Registers.hpp   Mon May 31 11:41:22 2021 +0000
@@ -350,9 +350,8 @@
       return REGNO_ARM32_SPSR;
     if (num >= DWARF_ARM32_D0 && num <= DWARF_ARM32_D31)
       return REGNO_ARM32_D0 + (num - DWARF_ARM32_D0);
-    if (num >= DWARF_ARM32_S0 && num <= DWARF_ARM32_S31) {
+    if (num >= DWARF_ARM32_S0 && num <= DWARF_ARM32_S31)
       return REGNO_ARM32_S0 + (num - DWARF_ARM32_S0);
-    }
     return LAST_REGISTER + 1;
   }
 
@@ -385,9 +384,9 @@
   void copyFloatVectorRegister(int num, uint64_t addr_) {
     const void *addr = reinterpret_cast<const void *>(addr_);
     if (num >= REGNO_ARM32_S0 && num <= REGNO_ARM32_S31) {
-      if ((flags & 1) == 0) {
-        lazyVFP1();
-        flags |= 1;
+      if ((flags & FLAGS_VFPV2_USED) == 0) {
+        lazyVFPv2();
+        flags |= FLAGS_VFPV2_USED;
       }
       /*
        * Emulate single precision register as half of the
@@ -402,27 +401,32 @@
         addr, sizeof(fpreg[0]) / 2);
     }
     if (num <= REGNO_ARM32_D15) {
-      if ((flags & 1) == 0) {
-        lazyVFP1();
-        flags |= 1;
+      if ((flags & FLAGS_VFPV2_USED) == 0) {
+        lazyVFPv2();
+        flags |= FLAGS_VFPV2_USED;
       }
     } else {
-      if ((flags & 2) == 0) {
-        lazyVFP3();
-        flags |= 2;
+      if ((flags & FLAGS_VFPV3_USED) == 0) {
+        lazyVFPv3();
+        flags |= FLAGS_VFPV3_USED;
       }
     }
     memcpy(fpreg + (num - REGNO_ARM32_D0), addr, sizeof(fpreg[0]));
   }
 
-  __dso_hidden void lazyVFP1();
-  __dso_hidden void lazyVFP3();
+  __dso_hidden void lazyVFPv2();
+  __dso_hidden void lazyVFPv3();
   __dso_hidden void jumpto() const __dead;
 
 private:
   uint32_t reg[REGNO_ARM32_SPSR + 1];
   uint32_t flags;
   uint64_t fpreg[32];
+
+  enum {
+    FLAGS_VFPV2_USED = 0x1,
+    FLAGS_VFPV3_USED = 0x2,
+  };
 };
 
 enum {
diff -r 10ebd06d52ed -r 4f4a1ee67e2f sys/lib/libunwind/unwind_registers.S
--- a/sys/lib/libunwind/unwind_registers.S      Mon May 31 11:12:42 2021 +0000
+++ b/sys/lib/libunwind/unwind_registers.S      Mon May 31 11:41:22 2021 +0000
@@ -360,37 +360,37 @@
        mrs     r1, cpsr
        str     r1, [r0, #64]   /* CPSR */
        mov     r1, #0
-       str     r1, [r0, #68]
+       str     r1, [r0, #68]   /* flags */
        RET
 END(_ZN7_Unwind15Registers_arm32C1Ev)
 
-       .hidden _ZN7_Unwind15Registers_arm328lazyVFP1Ev
-ARM_ENTRY(_ZN7_Unwind15Registers_arm328lazyVFP1Ev)
+       .hidden _ZN7_Unwind15Registers_arm329lazyVFPv2Ev
+ARM_ENTRY(_ZN7_Unwind15Registers_arm329lazyVFPv2Ev)
        add     r0, #72
        vstmia  r0, {d0-d15}
        RET
-END(_ZN7_Unwind15Registers_arm328lazyVFP1Ev)
+END(_ZN7_Unwind15Registers_arm329lazyVFPv2Ev)
 
-       .hidden _ZN7_Unwind15Registers_arm328lazyVFP3Ev
-ARM_ENTRY(_ZN7_Unwind15Registers_arm328lazyVFP3Ev)
+       .hidden _ZN7_Unwind15Registers_arm329lazyVFPv3Ev
+ARM_ENTRY(_ZN7_Unwind15Registers_arm329lazyVFPv3Ev)
        add     r0, #200
        vstmia  r0, {d16-d31}
        RET
-END(_ZN7_Unwind15Registers_arm328lazyVFP3Ev)
+END(_ZN7_Unwind15Registers_arm329lazyVFPv3Ev)
 
        .hidden _ZNK7_Unwind15Registers_arm326jumptoEv
 ARM_ENTRY(_ZNK7_Unwind15Registers_arm326jumptoEv)
-       ldrb    r1, [r0, #68]
+       ldrb    r1, [r0, #68]   /* flags */
        tst     r1, #1
-       beq     .Lnovfp1
+       beq     .Lnovfpv2
        add     r2, r0, #72
        vldmia  r2, {d0-d15}
-.Lnovfp1:
+.Lnovfpv2:
        tst     r1, #2
-       beq     .Lnovfp3
+       beq     .Lnovfpv3
        add     r2, r0, #200
        vldmia  r2, {d16-d31}
-.Lnovfp3:
+.Lnovfpv3:
        ldr     r1, [r0, #64]
        msr     cpsr_sxc, r1
        ldmia   r0, {r0-r15}