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[src/netbsd-8]: src/sys/dev/pci/ixgbe Pull up the following, requested by msa...



details:   https://anonhg.NetBSD.org/src/rev/7fc5f900c760
branches:  netbsd-8
changeset: 1026370:7fc5f900c760
user:      martin <martin%NetBSD.org@localhost>
date:      Sat Nov 20 15:21:31 2021 +0000

description:
Pull up the following, requested by msaitoh in ticket #1708:

        sys/dev/pci/ixgbe/ixgbe.h                       1.81-1.83
        sys/dev/pci/ixgbe/ixgbe.c                       1.291-1.292 via patch
        sys/dev/pci/ixgbe/ixgbe_type.h                  1.50
        sys/dev/pci/ixgbe/ixv.c                         1.167-1.168 via patch
        sys/dev/pci/ixgbe/ix_txrx.c                     1.94

- Fix a bug that a near 64KB TSO segment can't send.
- Reduce bus_dmamap_sync() cost.
- Use macro. Fix typos in comment.

diffstat:

 sys/dev/pci/ixgbe/ix_txrx.c    |  49 ++++++++++++++++++++++++++++++++++++------
 sys/dev/pci/ixgbe/ixgbe.c      |  17 +++++++------
 sys/dev/pci/ixgbe/ixgbe.h      |  21 +++++++++++++++--
 sys/dev/pci/ixgbe/ixgbe_type.h |   8 +++---
 sys/dev/pci/ixgbe/ixv.c        |  10 ++++----
 5 files changed, 78 insertions(+), 27 deletions(-)

diffs (270 lines):

diff -r f29d38f895c6 -r 7fc5f900c760 sys/dev/pci/ixgbe/ix_txrx.c
--- a/sys/dev/pci/ixgbe/ix_txrx.c       Sat Nov 20 15:11:31 2021 +0000
+++ b/sys/dev/pci/ixgbe/ix_txrx.c       Sat Nov 20 15:21:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ix_txrx.c,v 1.24.2.22 2021/09/15 16:38:00 martin Exp $ */
+/* $NetBSD: ix_txrx.c,v 1.24.2.23 2021/11/20 15:21:31 martin Exp $ */
 
 /******************************************************************************
 
@@ -64,7 +64,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.24.2.22 2021/09/15 16:38:00 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ix_txrx.c,v 1.24.2.23 2021/11/20 15:21:31 martin Exp $");
 
 #include "opt_inet.h"
 #include "opt_inet6.h"
@@ -1817,9 +1817,11 @@
        struct ixgbe_rx_buf     *rbuf, *nbuf;
        int                     i, nextp, processed = 0;
        u32                     staterr = 0;
-       u32                     loopcount = 0;
+       u32                     loopcount = 0, numdesc;
        u32                     limit = adapter->rx_process_limit;
        bool                    discard_multidesc = rxr->discard_multidesc;
+       bool                    wraparound = false;
+       unsigned int            syncremain;
 #ifdef RSS
        u16                     pkt_info;
 #endif
@@ -1836,6 +1838,24 @@
        }
 #endif /* DEV_NETMAP */
 
+       /* Sync the ring. The size is rx_process_limit or the first half */
+       if ((rxr->next_to_check + limit) <= rxr->num_desc) {
+               /* Non-wraparound */
+               numdesc = limit;
+               syncremain = 0;
+       } else {
+               /* Wraparound. Sync the first half. */
+               numdesc = rxr->num_desc - rxr->next_to_check;
+
+               /* Set the size of the last half */
+               syncremain = limit - numdesc;
+       }
+       bus_dmamap_sync(rxr->rxdma.dma_tag->dt_dmat,
+           rxr->rxdma.dma_map,
+           sizeof(union ixgbe_adv_rx_desc) * rxr->next_to_check,
+           sizeof(union ixgbe_adv_rx_desc) * numdesc,
+           BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+
        /*
         * The max number of loop is rx_process_limit. If discard_multidesc is
         * true, continue processing to not to send broken packet to the upper
@@ -1852,9 +1872,22 @@
                bool        eop;
                bool        discard = false;
 
-               /* Sync the ring. */
-               ixgbe_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
-                   BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
+               if (wraparound) {
+                       /* Sync the last half. */
+                       KASSERT(syncremain != 0);
+                       numdesc = syncremain;
+                       wraparound = false;
+               } else if (__predict_false(loopcount >= limit)) {
+                       KASSERT(discard_multidesc == true);
+                       numdesc = 1;
+               } else
+                       numdesc = 0;
+
+               if (numdesc != 0)
+                       bus_dmamap_sync(rxr->rxdma.dma_tag->dt_dmat,
+                           rxr->rxdma.dma_map, 0,
+                           sizeof(union ixgbe_adv_rx_desc) * numdesc,
+                           BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
 
                cur = &rxr->rx_base[i];
                staterr = le32toh(cur->wb.upper.status_error);
@@ -2118,8 +2151,10 @@
                    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
 
                /* Advance our pointers to the next descriptor. */
-               if (++i == rxr->num_desc)
+               if (++i == rxr->num_desc) {
+                       wraparound = true;
                        i = 0;
+               }
                rxr->next_to_check = i;
 
                /* Now send to the stack or do LRO */
diff -r f29d38f895c6 -r 7fc5f900c760 sys/dev/pci/ixgbe/ixgbe.c
--- a/sys/dev/pci/ixgbe/ixgbe.c Sat Nov 20 15:11:31 2021 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.c Sat Nov 20 15:21:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.c,v 1.88.2.44 2021/09/15 16:38:00 martin Exp $ */
+/* $NetBSD: ixgbe.c,v 1.88.2.45 2021/11/20 15:21:31 martin Exp $ */
 
 /******************************************************************************
 
@@ -64,7 +64,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.88.2.44 2021/09/15 16:38:00 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixgbe.c,v 1.88.2.45 2021/11/20 15:21:31 martin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
@@ -807,7 +807,7 @@
        aprint_normal(": %s, Version - %s\n",
            ixgbe_strings[ent->index], ixgbe_driver_version);
 
-       /* Core Lock Init*/
+       /* Core Lock Init */
        IXGBE_CORE_LOCK_INIT(adapter, device_xname(dev));
 
        /* Set up the timer callout */
@@ -881,11 +881,12 @@
        hw->allow_unsupported_sfp = allow_unsupported_sfp;
 
        /* Pick up the 82599 settings */
-       if (hw->mac.type != ixgbe_mac_82598EB) {
+       if (hw->mac.type != ixgbe_mac_82598EB)
                hw->phy.smart_speed = ixgbe_smart_speed;
-               adapter->num_segs = IXGBE_82599_SCATTER;
-       } else
-               adapter->num_segs = IXGBE_82598_SCATTER;
+
+       /* Set the right number of segments */
+       KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT);
+       adapter->num_segs = IXGBE_SCATTER_DEFAULT;
 
        /* Ensure SW/FW semaphore is free */
        ixgbe_init_swfw_semaphore(hw);
@@ -3998,7 +3999,7 @@
                txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
                txdctl |= IXGBE_TXDCTL_ENABLE;
                /* Set WTHRESH to 8, burst writeback */
-               txdctl |= (8 << 16);
+               txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT;
                /*
                 * When the internal queue falls below PTHRESH (32),
                 * start prefetching as long as there are at least
diff -r f29d38f895c6 -r 7fc5f900c760 sys/dev/pci/ixgbe/ixgbe.h
--- a/sys/dev/pci/ixgbe/ixgbe.h Sat Nov 20 15:11:31 2021 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe.h Sat Nov 20 15:21:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe.h,v 1.24.6.22 2021/09/15 16:38:01 martin Exp $ */
+/* $NetBSD: ixgbe.h,v 1.24.6.23 2021/11/20 15:21:31 martin Exp $ */
 
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
@@ -185,6 +185,23 @@
  */
 #define IXGBE_RX_COPY_LEN_MAX     (MHLEN - ETHER_ALIGN)
 
+/*
+ * Default TX WTHRESH value.
+ * Currently, we don't use the Tx Head Pointer Write Back function.
+ */
+#define IXGBE_TX_WTHRESH       5
+
+/*
+ * The max number of descriptors that one packet can use is 40 - WTHRESH - 2.
+ * Though 82598 does not have this limit, we don't want long TX chain.
+ * 33 should be large enough even for 64K TSO
+ * (32 * 2K mbuf cluster and 1 x mbuf header).
+ *
+ * Reference: 82599-X550 datasheet 7.2.1.1 "Transmit Storage in System Memory".
+ */
+#define IXGBE_82599_SCATTER_MAX        (40 - IXGBE_TX_WTHRESH - 2)
+#define IXGBE_SCATTER_DEFAULT  33
+
 /* Keep older OS drivers building... */
 #if !defined(SYSCTL_ADD_UQUAD)
 #define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
@@ -206,8 +223,6 @@
 #define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
 
 #define MAX_NUM_MULTICAST_ADDRESSES     128
-#define IXGBE_82598_SCATTER             100
-#define IXGBE_82599_SCATTER             32
 #define MSIX_82598_BAR                  3
 #define MSIX_82599_BAR                  4
 #define IXGBE_TSO_SIZE                  262140
diff -r f29d38f895c6 -r 7fc5f900c760 sys/dev/pci/ixgbe/ixgbe_type.h
--- a/sys/dev/pci/ixgbe/ixgbe_type.h    Sat Nov 20 15:11:31 2021 +0000
+++ b/sys/dev/pci/ixgbe/ixgbe_type.h    Sat Nov 20 15:21:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixgbe_type.h,v 1.22.2.13 2021/09/15 16:38:01 martin Exp $ */
+/* $NetBSD: ixgbe_type.h,v 1.22.2.14 2021/11/20 15:21:31 martin Exp $ */
 
 /******************************************************************************
   SPDX-License-Identifier: BSD-3-Clause
@@ -358,7 +358,7 @@
 #define IXGBE_MIN_INT_RATE     956
 /* On 82599 and newer, minimum RSC_DELAY is 4us. ITR interval must be larger
  * than RSC_DELAY if RSC is used. ITR_INTERVAL is in 2(.048) us units on 10G
- * and 1G. The minimun EITR is 6us.
+ * and 1G. The minimum EITR is 6us.
  */
 #define IXGBE_MIN_RSC_EITR_10G1G 0x00000018
 #define IXGBE_MAX_EITR         0x00000FF8
@@ -1504,7 +1504,7 @@
 #define IXGBE_CTRL_RST_MASK    (IXGBE_CTRL_LNK_RST | IXGBE_CTRL_RST)
 
 /* FACTPS */
-#define IXGBE_FACTPS_MNGCG     0x20000000 /* Manageblility Clock Gated */
+#define IXGBE_FACTPS_MNGCG     0x20000000 /* Managebility Clock Gated */
 #define IXGBE_FACTPS_LFS       0x40000000 /* LAN Function Select */
 
 /* MHADD Bit Masks */
@@ -2351,7 +2351,7 @@
 /* EEPROM Addressing bits based on type (0-small, 1-large) */
 #define IXGBE_EEC_ADDR_SIZE    0x00000400
 #define IXGBE_EEC_SIZE         0x00007800 /* EEPROM Size */
-#define IXGBE_EERD_MAX_ADDR    0x00003FFF /* EERD alows 14 bits for addr. */
+#define IXGBE_EERD_MAX_ADDR    0x00003FFF /* EERD allows 14 bits for addr. */
 
 #define IXGBE_EEC_SIZE_SHIFT           11
 #define IXGBE_EEPROM_WORD_SIZE_SHIFT   6
diff -r f29d38f895c6 -r 7fc5f900c760 sys/dev/pci/ixgbe/ixv.c
--- a/sys/dev/pci/ixgbe/ixv.c   Sat Nov 20 15:11:31 2021 +0000
+++ b/sys/dev/pci/ixgbe/ixv.c   Sat Nov 20 15:21:31 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: ixv.c,v 1.56.2.32 2021/09/15 16:38:01 martin Exp $ */
+/* $NetBSD: ixv.c,v 1.56.2.33 2021/11/20 15:21:31 martin Exp $ */
 
 /******************************************************************************
 
@@ -35,7 +35,7 @@
 /*$FreeBSD: head/sys/dev/ixgbe/if_ixv.c 331224 2018-03-19 20:55:05Z erj $*/
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ixv.c,v 1.56.2.32 2021/09/15 16:38:01 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ixv.c,v 1.56.2.33 2021/11/20 15:21:31 martin Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_inet.h"
@@ -424,7 +424,8 @@
        ixgbe_init_mbx_params_vf(hw);
 
        /* Set the right number of segments */
-       adapter->num_segs = IXGBE_82599_SCATTER;
+       KASSERT(IXGBE_82599_SCATTER_MAX >= IXGBE_SCATTER_DEFAULT);
+       adapter->num_segs = IXGBE_SCATTER_DEFAULT;
 
        /* Reset mbox api to 1.0 */
        error = hw->mac.ops.reset_hw(hw);
@@ -1350,7 +1351,6 @@
        return;
 
 watchdog:
-
        device_printf(adapter->dev, "Watchdog timeout -- resetting\n");
        adapter->ifp->if_flags &= ~IFF_RUNNING;
        adapter->watchdog_events.ev_count++;
@@ -1673,7 +1673,7 @@
 
                /* Set WTHRESH to 8, burst writeback */
                txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
-               txdctl |= (8 << 16);
+               txdctl |= IXGBE_TX_WTHRESH << IXGBE_TXDCTL_WTHRESH_SHIFT;
                IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
 
                /* Set the HW Tx Head and Tail indices */



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