Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/netbsd-8]: src/doc Tickets #1710 - #1715
details: https://anonhg.NetBSD.org/src/rev/ac1ba71a2cf8
branches: netbsd-8
changeset: 1026634:ac1ba71a2cf8
user: martin <martin%NetBSD.org@localhost>
date: Fri Dec 03 19:55:03 2021 +0000
description:
Tickets #1710 - #1715
diffstat:
doc/CHANGES-8.3 | 87 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 86 insertions(+), 1 deletions(-)
diffs (98 lines):
diff -r b523cd0a1994 -r ac1ba71a2cf8 doc/CHANGES-8.3
--- a/doc/CHANGES-8.3 Fri Dec 03 19:53:32 2021 +0000
+++ b/doc/CHANGES-8.3 Fri Dec 03 19:55:03 2021 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: CHANGES-8.3,v 1.1.2.110 2021/11/30 11:49:40 martin Exp $
+# $NetBSD: CHANGES-8.3,v 1.1.2.111 2021/12/03 19:55:03 martin Exp $
A complete list of changes from the NetBSD 8.2 release to the NetBSD 8.3
release:
@@ -2220,3 +2220,88 @@
PR 56525: fix a bug that I2C access panics on old AMD chipset
(e.g SB600).
[msaitoh, ticket #1709]
+
+sys/dev/pci/pcidevs 1.1441-1.1444
+sys/dev/pci/pcidevs.h regen
+sys/dev/pci/pcidevs_data.h regen
+
+ - Add Intel Gemini Lake TXE HECI 1.
+ - Add Intel Elkhart Lake and Rocket Lake devices.
+ - Update Jasper Lake's Processor Transaction Routers.
+ [msaitoh, ticket #1710]
+
+sys/dev/pci/ichsmb.c 1.69, 1.71, 1.73-1.75 via patch
+
+ - Add Intel 400, 495, and 500 series support.
+ - Add Intel Jasper Lake and Elkhart Lake support.
+ - Ignores the SMBALERT# interrupt. Same as other OSes.
+ [msaitoh, ticket #1711]
+
+sys/dev/pci/pucdata.c 1.103, 1.106-1.112
+share/man/man4/puc.4 1.42-1.43
+
+ - Add Amazon.com EC2 virtual 16650-compatible PCI serial device.
+ - Add NetMos NM9900 Quad and Octal serial card.
+ - Add ASIX AX99100 PCIe 4port serial card.
+ - Add Oxford Semiconductor Exsys EX-41098 PCI serial card.
+ [msaitoh, ticket #1712]
+
+sys/dev/sdmmc/sdhc.c 1.110, 1.112
+sys/dev/sdmmc/sdmmc_mem.c 1.74
+sys/dev/pci/sdhc_pci.c 1.18
+
+ - Support 64bit BAR.
+ - Use unsigned to avoid undefined behavior in hwrite[12]() and
+ sdmmc_mem_sd_switch().
+ - Fix typo in comment.
+ [msaitoh, ticket #1713]
+
+sys/dev/pci/pcireg.h 1.148-1.154, 1.156-1.161
+sys/dev/pci/pci_subr.c 1.217-1.222, 1.224, 1.227-1.232 via patch
+sys/dev/pci/nvme_pci.c 1.31
+sys/dev/pci/pci.c 1.158
+sys/dev/pci/ppb.c 1.74
+
+ - Print Bridge Config Retry Enable bit and Retimer Presence Detect
+ Supported bit.
+ - Add PCIe 4.0 stuff a little:
+ - 10-bit Tag Requester/Completer.
+ - Add Data link Feature extended capability.
+ - Add Physical Layer 16.0 GT/s extended capability. Not decode yet.
+ - Change pci_conf_print() to allocate memory for the regs dynamically
+ instead of on-stack.
+ - Print some DPC register values not with %04x but with %08x because
+ those are 32bit.
+ - Fix a bug that the virtual channel extended configuration's
+ arbitration phase register can't be decoded correctly.
+ - When parsing Enhanced Allocation entries, use the correct calculation
+ for finding the next entry.
+ - Add 32.0GT/s to the list of pcie speeds (PCIe 5.x.).
+ - Add Some PCI config information:
+ - Lane Margining at the Receiver
+ - NVME admin interface
+ - UFSHCI
+ - InfiniBand
+ - Host fabric
+ - HDA 1.0 with vendor ext
+ - USB4 HCI
+ - MIPI I3C
+ - Cellular controller/modem (+ Ethernet)
+ - Change PCI_VENDOR_MASK and PCI_PRODUCT_MASK to unsigned values, to
+ prevent sign extension of product ID when shifted up into place in
+ PCI_ID_CODE(). Fixes PR kern/56176.
+ - Add LCAP & LCAP2 definitions.
+ - Use PCI-SIG official acronyms for some macros.
+ - Remove unused shift and mask definitions.
+ - Fix typo in some messages.
+ - Fix typo in comments.
+ - Whitespace fixes.
+ [msaitoh, ticket #1714]
+
+sys/arch/x86/x86/procfs_machdep.c 1.40-1.42
+
+ - Add v_spec_ctrl, avx512_fp16, sme, sev, sev_es, sgx, sgx_lc,
+ serialize and tsxldtrk.
+ - Whitespace fix.
+ [msaitoh, ticket #1715]
+
Home |
Main Index |
Thread Index |
Old Index