[src/trunk]: src/sys/external/bsd/drm2/dist/drm/i915 i915: Move page table bi...

[riastradh <riastradh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/52726fce17a2
branches:  trunk
changeset: 1028532:52726fce17a2
user:      riastradh <riastradh%NetBSD.org@localhost>
date:      Sun Dec 19 11:15:49 2021 +0000

description:
i915: Move page table bits from gvt/gtt.h to gt/intel_gtt.h.

diffstat:

 sys/external/bsd/drm2/dist/drm/i915/gt/intel_gtt.h |  13 ++++++++++++-
 sys/external/bsd/drm2/dist/drm/i915/gvt/gtt.h      |  13 +------------
 2 files changed, 13 insertions(+), 13 deletions(-)

diffs (54 lines):

diff -r 8e9124e20b8b -r 52726fce17a2 sys/external/bsd/drm2/dist/drm/i915/gt/intel_gtt.h
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_gtt.h        Sun Dec 19 11:15:41 2021 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_gtt.h        Sun Dec 19 11:15:49 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intel_gtt.h,v 1.8 2021/12/19 11:15:33 riastradh Exp $  */
+/*     $NetBSD: intel_gtt.h,v 1.9 2021/12/19 11:15:49 riastradh Exp $  */
 
 /* SPDX-License-Identifier: MIT */
 /*
@@ -33,6 +33,17 @@
 #include "i915_selftest.h"
 #include "i915_vma_types.h"
 
+#ifdef __NetBSD__
+#include <drm/bus_dma_hacks.h>
+#include <x86/machdep.h>
+#include <x86/pte.h>
+#define        _PAGE_PRESENT   PG_V    /* 0x01 PTE is present / valid */
+#define        _PAGE_RW        PG_RW   /* 0x02 read/write */
+#define        _PAGE_PWT       PG_WT   /* 0x08 write-through */
+#define        _PAGE_PCD       PG_N    /* 0x10 page cache disabled / non-cacheable */
+#define        _PAGE_PAT       PG_PAT  /* 0x80 page attribute table on PTE */
+#endif
+
 #define I915_GFP_ALLOW_FAIL (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
 
 #if IS_ENABLED(CONFIG_DRM_I915_TRACE_GTT)
diff -r 8e9124e20b8b -r 52726fce17a2 sys/external/bsd/drm2/dist/drm/i915/gvt/gtt.h
--- a/sys/external/bsd/drm2/dist/drm/i915/gvt/gtt.h     Sun Dec 19 11:15:41 2021 +0000
+++ b/sys/external/bsd/drm2/dist/drm/i915/gvt/gtt.h     Sun Dec 19 11:15:49 2021 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: gtt.h,v 1.3 2021/12/19 01:24:25 riastradh Exp $        */
+/*     $NetBSD: gtt.h,v 1.4 2021/12/19 11:15:49 riastradh Exp $        */
 
 /*
  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
@@ -36,17 +36,6 @@
 #ifndef _GVT_GTT_H_
 #define _GVT_GTT_H_
 
-#ifdef __NetBSD__
-#include <drm/bus_dma_hacks.h>
-#include <x86/machdep.h>
-#include <x86/pte.h>
-#define        _PAGE_PRESENT   PG_V    /* 0x01 PTE is present / valid */
-#define        _PAGE_RW        PG_RW   /* 0x02 read/write */
-#define        _PAGE_PWT       PG_WT   /* 0x08 write-through */
-#define        _PAGE_PCD       PG_N    /* 0x10 page cache disabled / non-cacheable */
-#define        _PAGE_PAT       PG_PAT  /* 0x80 page attribute table on PTE */
-#endif
-
 #define I915_GTT_PAGE_SHIFT         12
 
 struct intel_vgpu_mm;