Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[xsrc/trunk]: xsrc/external/mit/xf86-video-suncg14/dist/src add macros to sim...
details: https://anonhg.NetBSD.org/xsrc/rev/8924f3b47144
branches: trunk
changeset: 10834:8924f3b47144
user: macallan <macallan%NetBSD.org@localhost>
date: Fri Dec 24 04:41:40 2021 +0000
description:
add macros to simplify issuing SX instructions, hide the address alignment /
displacement shenanigans SX needs, and make the code more resemble the
inline assembler source it arguably is
diffstat:
external/mit/xf86-video-suncg14/dist/src/cg14.h | 3 +
external/mit/xf86-video-suncg14/dist/src/cg14_accel.c | 341 +++++++---------
external/mit/xf86-video-suncg14/dist/src/cg14_render.c | 311 +++++---------
3 files changed, 271 insertions(+), 384 deletions(-)
diffs (truncated from 1237 to 300 lines):
diff -r 1a3f2152a9f0 -r 8924f3b47144 external/mit/xf86-video-suncg14/dist/src/cg14.h
--- a/external/mit/xf86-video-suncg14/dist/src/cg14.h Sun Dec 19 04:50:27 2021 +0000
+++ b/external/mit/xf86-video-suncg14/dist/src/cg14.h Fri Dec 24 04:41:40 2021 +0000
@@ -135,6 +135,9 @@
p->queuecount++;
}
+#define sxi(inst) write_sx_reg(p, SX_INSTRUCTIONS, (inst))
+#define sxm(inst, addr, reg, count) write_sx_io(p, (addr) & ~7, inst((reg), (count), (addr) & 7))
+
Bool CG14SetupCursor(ScreenPtr);
Bool CG14InitAccel(ScreenPtr);
diff -r 1a3f2152a9f0 -r 8924f3b47144 external/mit/xf86-video-suncg14/dist/src/cg14_accel.c
--- a/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c Sun Dec 19 04:50:27 2021 +0000
+++ b/external/mit/xf86-video-suncg14/dist/src/cg14_accel.c Fri Dec 24 04:41:40 2021 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cg14_accel.c,v 1.26 2021/12/19 04:50:27 macallan Exp $ */
+/* $NetBSD: cg14_accel.c,v 1.27 2021/12/24 04:41:40 macallan Exp $ */
/*
* Copyright (c) 2013 Michael Lorenz
* All rights reserved.
@@ -184,10 +184,8 @@
d = dststart;
while ( count < w) {
num = min(32, w - count);
- write_sx_io(p, s,
- SX_LD(10, num - 1, s & 7));
- write_sx_io(p, d,
- SX_STM(10, num - 1, d & 7));
+ sxm(SX_LD, s, 10, num - 1);
+ sxm(SX_STM, d, 10, num - 1);
s += xinc;
d += xinc;
count += 32;
@@ -203,10 +201,8 @@
d = dststart;
count = w;
for (i = 0; i < chunks; i++) {
- write_sx_io(p, s,
- SX_LD(10, 31, s & 7));
- write_sx_io(p, d,
- SX_STM(10, 31, d & 7));
+ sxm(SX_LD, s, 10, 31);
+ sxm(SX_STM, d, 10, 31);
s -= 128;
d -= 128;
count -= 32;
@@ -215,10 +211,8 @@
if (count > 0) {
s += (32 - count) << 2;
d += (32 - count) << 2;
- write_sx_io(p, s,
- SX_LD(10, count - 1, s & 7));
- write_sx_io(p, d,
- SX_STM(10, count - 1, d & 7));
+ sxm(SX_LD, s, 10, count - 1);
+ sxm(SX_STM, d, 10, count - 1);
}
srcstart += srcinc;
dststart += dstinc;
@@ -234,21 +228,15 @@
d = dststart;
while ( count < w) {
num = min(32, w - count);
- write_sx_io(p, s,
- SX_LD(10, num - 1, s & 7));
- write_sx_io(p, d,
- SX_LD(42, num - 1, d & 7));
+ sxm(SX_LD, s, 10, num - 1);
+ sxm(SX_LD, d, 42, num - 1);
if (num > 16) {
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(10, 42, 74, 15));
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(26, 58, 90, num - 17));
+ sxi(SX_ROP(10, 42, 74, 15));
+ sxi(SX_ROP(26, 58, 90, num - 17));
} else {
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(10, 42, 74, num - 1));
+ sxi(SX_ROP(10, 42, 74, num - 1));
}
- write_sx_io(p, d,
- SX_STM(74, num - 1, d & 7));
+ sxm(SX_STM, d, 74, num - 1);
s += xinc;
d += xinc;
count += 32;
@@ -264,14 +252,11 @@
d = dststart;
count = w;
for (i = 0; i < chunks; i++) {
- write_sx_io(p, s, SX_LD(10, 31, s & 7));
- write_sx_io(p, d, SX_LD(42, 31, d & 7));
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(10, 42, 74, 15));
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(26, 58, 90, 15));
- write_sx_io(p, d,
- SX_STM(74, 31, d & 7));
+ sxm(SX_LD, s, 10, 31);
+ sxm(SX_LD, d, 42, 31);
+ sxi(SX_ROP(10, 42, 74, 15));
+ sxi(SX_ROP(26, 58, 90, 15));
+ sxm(SX_STM, d, 74, 31);
s -= 128;
d -= 128;
count -= 32;
@@ -280,22 +265,15 @@
if (count > 0) {
s += (32 - count) << 2;
d += (32 - count) << 2;
- write_sx_io(p, s,
- SX_LD(10, count - 1, s & 7));
- write_sx_io(p, d,
- SX_LD(42, count - 1, d & 7));
+ sxm(SX_LD, s, 10, count - 1);
+ sxm(SX_LD, d, 42, count - 1);
if (count > 16) {
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(10, 42, 74, 15));
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(26, 58, 90, count - 17));
+ sxi(SX_ROP(10, 42, 74, 15));
+ sxi(SX_ROP(26, 58, 90, count - 17));
} else {
- write_sx_reg(p, SX_INSTRUCTIONS,
- SX_ROP(10, 42, 74, count - 1));
+ sxi(SX_ROP(10, 42, 74, count - 1));
}
-
- write_sx_io(p, d,
- SX_STM(74, count - 1, d & 7));
+ sxm(SX_STM, d, 74, count - 1);
}
srcstart += srcinc;
dststart += dstinc;
@@ -309,7 +287,8 @@
* copy with same alignment, left to right, no ROP
*/
static void
-CG14Copy8_aligned_norop(Cg14Ptr p, int srcstart, int dststart, int w, int h, int srcpitch, int dstpitch)
+CG14Copy8_aligned_norop(Cg14Ptr p, int srcstart, int dststart, int w, int h,
+ int srcpitch, int dstpitch)
{
int saddr, daddr, pre, cnt, wrds;
@@ -324,8 +303,8 @@
daddr = dststart;
cnt = w;
if (pre > 0) {
- write_sx_io(p, saddr & ~7, SX_LDB(8, pre - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_STB(8, pre - 1, daddr & 7));
+ sxm(SX_LDB, saddr, 8, pre - 1);
+ sxm(SX_STB, daddr, 8, pre - 1);
saddr += pre;
daddr += pre;
cnt -= pre;
@@ -333,15 +312,15 @@
}
while (cnt > 3) {
wrds = min(32, cnt >> 2);
- write_sx_io(p, saddr & ~7, SX_LD(8, wrds - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_ST(8, wrds - 1, daddr & 7));
+ sxm(SX_LD, saddr, 8, wrds - 1);
+ sxm(SX_ST, daddr, 8, wrds - 1);
saddr += wrds << 2;
daddr += wrds << 2;
cnt -= wrds << 2;
}
if (cnt > 0) {
- write_sx_io(p, saddr & ~7, SX_LDB(8, cnt - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_STB(8, cnt - 1, daddr & 7));
+ sxm(SX_LDB, saddr, 8, cnt - 1);
+ sxm(SX_STB, daddr, 8, cnt - 1);
}
next:
srcstart += srcpitch;
@@ -354,7 +333,8 @@
* copy with same alignment, left to right, ROP
*/
static void
-CG14Copy8_aligned_rop(Cg14Ptr p, int srcstart, int dststart, int w, int h, int srcpitch, int dstpitch)
+CG14Copy8_aligned_rop(Cg14Ptr p, int srcstart, int dststart, int w, int h,
+ int srcpitch, int dstpitch)
{
int saddr, daddr, pre, cnt, wrds;
@@ -369,10 +349,10 @@
daddr = dststart;
cnt = w;
if (pre > 0) {
- write_sx_io(p, saddr & ~7, SX_LDB(8, pre - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_LDB(40, pre - 1, daddr & 7));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROP(8, 40, 72, pre - 1));
- write_sx_io(p, daddr & ~7, SX_STB(72, pre - 1, daddr & 7));
+ sxm(SX_LDB, saddr, 8, pre - 1);
+ sxm(SX_LDB, daddr, 40, pre - 1);
+ sxi(SX_ROP(8, 40, 72, pre - 1));
+ sxm(SX_STB, daddr, 72, pre - 1);
saddr += pre;
daddr += pre;
cnt -= pre;
@@ -380,23 +360,23 @@
}
while (cnt > 3) {
wrds = min(32, cnt >> 2);
- write_sx_io(p, saddr & ~7, SX_LD(8, wrds - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_LD(40, wrds - 1, daddr & 7));
+ sxm(SX_LD, saddr, 8, wrds - 1);
+ sxm(SX_LD, daddr, 40, wrds - 1);
if (cnt > 16) {
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROP(8, 40, 72, 15));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROP(8, 56, 88, wrds - 17));
+ sxi(SX_ROP(8, 40, 72, 15));
+ sxi(SX_ROP(8, 56, 88, wrds - 17));
} else
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROP(8, 40, 72, wrds - 1));
- write_sx_io(p, daddr & ~7, SX_ST(72, wrds - 1, daddr & 7));
+ sxi(SX_ROP(8, 40, 72, wrds - 1));
+ sxm(SX_ST, daddr, 72, wrds - 1);
saddr += wrds << 2;
daddr += wrds << 2;
cnt -= wrds << 2;
}
if (cnt > 0) {
- write_sx_io(p, saddr & ~7, SX_LDB(8, cnt - 1, saddr & 7));
- write_sx_io(p, daddr & ~7, SX_LDB(40, cnt - 1, daddr & 7));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROP(8, 40, 72, cnt - 1));
- write_sx_io(p, daddr & ~7, SX_STB(72, cnt - 1, daddr & 7));
+ sxm(SX_LDB, saddr, 8, cnt - 1);
+ sxm(SX_LDB, daddr, 40, cnt - 1);
+ sxi(SX_ROP(8, 40, 72, cnt - 1));
+ sxm(SX_STB, daddr, 72, cnt - 1);
}
next:
srcstart += srcpitch;
@@ -459,38 +439,38 @@
daddr = dststart & ~3;
while (h > 0) {
- write_sx_io(p, daddr & ~7, SX_LD(80, wrds - 1, daddr & 7));
- write_sx_io(p, saddr & ~7, SX_LD(sreg, swrds - 1, saddr & 7));
+ sxm(SX_LD, daddr, 80, wrds - 1);
+ sxm(SX_LD, saddr, sreg, swrds - 1);
if (wrds > 15) {
if (dist != 0) {
- write_sx_reg(p, SX_INSTRUCTIONS, SX_FUNNEL_I(8, dist, 40, 15));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_FUNNEL_I(24, dist, 56, wrds - 16));
+ sxi(SX_FUNNEL_I(8, dist, 40, 15));
+ sxi(SX_FUNNEL_I(24, dist, 56, wrds - 16));
/* shifted source pixels are now at register 40+ */
ssreg = 40;
} else ssreg = 8;
if (pre != 0) {
/* mask out leading junk */
write_sx_reg(p, SX_QUEUED(R_MASK), lmask);
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg, 80, 8, 0));
+ sxi(SX_ROPB(ssreg, 80, 8, 0));
write_sx_reg(p, SX_QUEUED(R_MASK), 0xffffffff);
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg + 1, 81, 9, 14));
+ sxi(SX_ROPB(ssreg + 1, 81, 9, 14));
} else {
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg, 80, 8, 15));
+ sxi(SX_ROPB(ssreg, 80, 8, 15));
}
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg + 16, 96, 24, wrds - 16));
+ sxi(SX_ROPB(ssreg + 16, 96, 24, wrds - 16));
} else {
if (dist != 0) {
- write_sx_reg(p, SX_INSTRUCTIONS, SX_FUNNEL_I(8, dist, 40, wrds));
+ sxi(SX_FUNNEL_I(8, dist, 40, wrds));
ssreg = 40;
} else ssreg = 8;
if (pre != 0) {
/* mask out leading junk */
write_sx_reg(p, SX_QUEUED(R_MASK), lmask);
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg, 80, 8, 0));
+ sxi(SX_ROPB(ssreg, 80, 8, 0));
write_sx_reg(p, SX_QUEUED(R_MASK), 0xffffffff);
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg + 1, 81, 9, wrds));
+ sxi(SX_ROPB(ssreg + 1, 81, 9, wrds));
} else {
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ROPB(ssreg, 80, 8, wrds));
+ sxi(SX_ROPB(ssreg, 80, 8, wrds));
}
}
if (post != 0) {
@@ -502,15 +482,15 @@
* the left end but it's less annoying this way and
* the instruction count is the same
*/
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ANDS(7 + wrds, 7, 5, 0));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ANDS(79 + wrds, 6, 4, 0));
- write_sx_reg(p, SX_INSTRUCTIONS, SX_ORS(5, 4, 7 + wrds, 0));
+ sxi(SX_ANDS(7 + wrds, 7, 5, 0));
+ sxi(SX_ANDS(79 + wrds, 6, 4, 0));
+ sxi(SX_ORS(5, 4, 7 + wrds, 0));
}
Home |
Main Index |
Thread Index |
Old Index