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[src/trunk]: src/sys/arch/arm/sociox retire SocioNext AVE 32/64 GbE driver



details:   https://anonhg.NetBSD.org/src/rev/3fef8746abe5
branches:  trunk
changeset: 359939:3fef8746abe5
user:      nisimura <nisimura%NetBSD.org@localhost>
date:      Tue Feb 01 08:58:25 2022 +0000

description:
retire SocioNext AVE 32/64 GbE driver

diffstat:

 sys/arch/arm/sociox/files.sociox |     7 +-
 sys/arch/arm/sociox/if_ave.c     |  1359 --------------------------------------
 2 files changed, 1 insertions(+), 1365 deletions(-)

diffs (truncated from 1384 to 300 lines):

diff -r e49632ee9e56 -r 3fef8746abe5 sys/arch/arm/sociox/files.sociox
--- a/sys/arch/arm/sociox/files.sociox  Tue Feb 01 05:27:40 2022 +0000
+++ b/sys/arch/arm/sociox/files.sociox  Tue Feb 01 08:58:25 2022 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.sociox,v 1.10 2021/12/03 05:21:52 nisimura Exp $
+#      $NetBSD: files.sociox,v 1.11 2022/02/01 09:08:33 nisimura Exp $
 #
 # Configuration info for Socionext SC2A11
 #
@@ -10,11 +10,6 @@
 attach scx at fdt with scx_fdt
 file   arch/arm/sociox/if_scx.c                scx
 
-# Unifier AVE GbE
-device ave: ether, ifnet, arp, mii, bus_dma_generic
-attach ave at fdt with ave_fdt
-file   arch/arm/sociox/if_ave.c                ave
-
 # Socionext eMMC
 device sniemmc: sdmmcbus
 attach sniemmc at acpinodebus with sniemmc_acpi
diff -r e49632ee9e56 -r 3fef8746abe5 sys/arch/arm/sociox/if_ave.c
--- a/sys/arch/arm/sociox/if_ave.c      Tue Feb 01 05:27:40 2022 +0000
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,1359 +0,0 @@
-/*     $NetBSD: if_ave.c,v 1.22 2021/12/31 14:25:22 riastradh Exp $    */
-
-/*-
- * Copyright (c) 2020 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Tohru Nishimura.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-/*
- * Socionext UniPhier AVE GbE driver
- *
- * There are two groups for 64bit paddr model and 32bit paddr.
- */
-
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_ave.c,v 1.22 2021/12/31 14:25:22 riastradh Exp $");
-
-#include <sys/param.h>
-#include <sys/bus.h>
-#include <sys/intr.h>
-#include <sys/device.h>
-#include <sys/callout.h>
-#include <sys/ioctl.h>
-#include <sys/malloc.h>
-#include <sys/mbuf.h>
-#include <sys/errno.h>
-#include <sys/rndsource.h>
-#include <sys/kernel.h>
-#include <sys/systm.h>
-
-#include <net/if.h>
-#include <net/if_media.h>
-#include <net/if_dl.h>
-#include <net/if_ether.h>
-#include <dev/mii/mii.h>
-#include <dev/mii/miivar.h>
-#include <net/bpf.h>
-
-#include <dev/fdt/fdtvar.h>
-
-#define NOT_MP_SAFE    (0)
-
-/*
- * AVE has two different, rather obscure, descriptor formats. 32-bit
- * paddr descriptor layout occupies 8 bytes while 64-bit paddr descriptor
- * does 12 bytes. AVE is a derivative of Synopsys DesignWare Core
- * EMAC.
- */
-struct tdes {
-       uint32_t t0, t1, t2;
-};
-
-struct rdes {
-       uint32_t r0, r1, r2;
-};
-
-struct tdes32 { uint32_t t0, t1; };
-struct rdes32 { uint32_t r0, r1; };
-
-#define T0_OWN         (1U<<31)        /* desc is ready to Tx */
-#define T0_IOC         (1U<<29)        /* post interrupt on Tx completes */
-#define T0_NOCSUM      (1U<<28)        /* inhibit checksum operation */
-#define T0_DONEOK      (1U<<27)        /* status - Tx completed ok */
-#define T0_FS          (1U<<26)        /* first segment of frame */
-#define T0_LS          (1U<<25)        /* last segment of frame */
-#define T0_OWC         (1U<<21)        /* status - out of win. late coll. */
-#define T0_ECOL                (1U<<20)        /* status - excess collision */
-#define T0_TBS_MASK    0xffff          /* T0 segment length 15:0 */
-/* T1 segment address 31:0 */
-/* T2 segment address 63:32 */
-#define R0_OWN         (1U<<31)        /* desc is empty */
-#define R0_CSUM                (1U<<21)        /* receive checksum done */
-#define R0_CERR                (1U<<20)        /* csum found negative */
-#define R0_FL_MASK     0x07ff          /* R0 frame length 10:0 */
-/* R1 frame address 31:0 */
-/* R2 frame address 63:32 */
-
-#define AVEID          0x000           /* hardware ID */
-#define AVEHWVER       0x004           /* hardware version */
-#define AVEGR          0x008           /* chip global control */
-#define  GR_RXRST      (1U<<5)         /* RxFIFO reset */
-#define  GR_PHYRST     (1U<<4)         /* external PHY reset */
-#define  GR_GRST       (1U<<0)         /* full chip reset */
-#define AVECFG         0x00c           /* hw configuration */
-#define  CFG_FLE       (1U<<31)        /* filter function enable */
-#define  CFG_CKE       (1U<<30)        /* checksum enable */
-#define  CFG_MII       (1U<<27)        /* 1: RMII/MII, 0: RGMII */
-#define  CFG_IPFCKE    (1U<<24)        /* IP framgment csum enable */
-#define AVEGIMR                0x100           /* global interrupt mask */
-#define AVEGISR                0x104           /* global interrupt status */
-#define  GISR_PHY      (1U<<24)        /* PHY status change detected */
-#define  GISR_TXCI     (1U<<16)        /* transmission completed */
-#define  GISR_RXF2L    (1U<<8)         /* Rx frame length beyond limit */
-#define  GISR_RXOVF    (1U<<7)         /* RxFIFO oveflow detected */
-#define  GISR_RXDROP   (1U<<6)         /* PAUSE frame has been dropped */
-#define  GISR_RXIT     (1U<<5)         /* receive itimer notify */
-#define AVETXC         0x200           /* transmit control */
-#define  TXC_FCE       (1U<<18)        /* generate PAUSE to moderate Rx lvl */
-#define  TXC_SPD1000   (1U<<17)        /* use 1000Mbps */
-#define  TXC_SPD100    (1U<<16)        /* use 100Mbps */
-#define AVERXC         0x204           /* receive control */
-#define  RXC_EN                (1U<<30)        /* enable receive circuit */
-#define  RXC_USEFDX    (1U<<22)        /* use full-duplex */
-#define  RXC_FCE       (1U<<21)        /* accept PAUSE to throttle Tx */
-#define  RXC_AFE       (1U<<19)        /* use address filter (!promisc) */
-#define  RXC_DRPEN     (1U<<18)        /* drop receiving PAUSE frames */
-/* RXC 15:0 max frame length to accept */
-#define AVEMACL                0x208           /* MAC address lower */
-#define AVEMACH                0x20c           /* MAC address upper */
-#define AVEMDIOC       0x214           /* MDIO control */
-#define  MDIOC_RD      (1U<<3)         /* read op */
-#define  MDIOC_WR      (1U<<2)         /* write op */
-#define AVEMDADR       0x218           /* MDIO address -- 13:8 phy id */
-#define AVEMDWRD       0x21c           /* MDIO write data - 15:0 */
-#define AVEMDIOS       0x220           /* MDIO status */
-#define  MDIOS_BUSY    (1U<<0)         /* MDIO in progress */
-#define AVEMDRDD       0x224           /* MDIO read data */
-#define AVEDESCC       0x300           /* descriptor control */
-#define  DESCC_RD0     (1U<<3)         /* activate Rx0 descriptor to run */
-#define DESCC_RSTP     (1U<<2)         /* pause Rx descriptor */
-#define  DESCC_TD      (1U<<0)         /* activate Tx descriptor to run */
-/* 31:16 status report to read */
-#define AVETXDES       0x304           /* Tx descriptor control */
-/* 27:16 Tx descriptor byte count, 11:0 start address offset */
-#define AVERXDES0      0x308           /* Rx0 descriptor control */
-/* 30:16 Rx descriptor byte count, 14:0 start address offset */
-#define AVEITIRQC      0x34c           /* interval IRQ control */
-#define  ITIRQC_R0E    (1U<<27)        /* enable Rx0 interval timer */
-#define  INTMVAL       (20<<16)        /* 15:0 interval timer count */
-
-#define AVEAFB         0x0800          /* address filter base */
-#define AVEAFMSKB      0x0d00          /* byte mask base */
-#define  MSKBYTE0      0xfffffff3f     /* zeros in 7:6 */
-#define  MSKBYTE1      0x003ffffff     /* ones in 25:0 */
-#define  genmask0(x)   (MSKBYTE0 & (~0U << (x)))
-#define AVEAFMSKV      0x0e00          /* bit mask base */
-#define AVEAFRING      0x0f00          /* entry ring number selector */
-#define AVEAFEN                0x0ffc          /* entry enable bit vector */
-
-/* AVE has internal cache coherent memory tol hold descriptor arrays. */
-#define AVETDB         0x1000          /* 64-bit Tx desc store, upto 256 */
-#define AVERDB         0x1c00          /* 64-bit Rx desc store, upto 2048 */
-#define AVE32TDB       0x1000          /* 32-bit Tx store base, upto 256 */
-#define AVE32RDB       0x1800          /* 32-bit Rx store base, upto 2048 */
-
-#define AVERMIIC       0x8028          /* RMII control */
-#define  RMIIC_RST     (1U<<16)        /* reset operation */
-#define AVELINKSEL     0x8034          /* RMII speed selection */
-#define  LINKSEL_SPD100        (1U<<0)         /* use 100Mbps */
-
-#define CSR_READ(sc, off) \
-           bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (off))
-#define CSR_WRITE(sc, off, val) \
-           bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (off), (val))
-
-#define MD_NTXSEGS             16              /* fixed */
-#define MD_TXQUEUELEN          (MD_NTXDESC / MD_NTXSEGS)
-#define MD_TXQUEUELEN_MASK     (MD_TXQUEUELEN - 1)
-#define MD_TXQUEUE_GC          (MD_TXQUEUELEN / 4)
-#define MD_NTXDESC             256             /* this is max HW limit */
-#define MD_NTXDESC_MASK        (MD_NTXDESC - 1)
-#define MD_NEXTTX(x)           (((x) + 1) & MD_NTXDESC_MASK)
-#define MD_NEXTTXS(x)          (((x) + 1) & MD_TXQUEUELEN_MASK)
-
-#define MD_NRXDESC             256             /* tunable */
-#define MD_NRXDESC_MASK        (MD_NRXDESC - 1)
-#define MD_NEXTRX(x)           (((x) + 1) & MD_NRXDESC_MASK)
-
-struct ave_txsoft {
-       struct mbuf *txs_mbuf;          /* head of our mbuf chain */
-       bus_dmamap_t txs_dmamap;        /* our DMA map */
-       int txs_firstdesc;              /* first descriptor in packet */
-       int txs_lastdesc;               /* last descriptor in packet */
-       int txs_ndesc;                  /* # of descriptors used */
-};
-
-struct ave_rxsoft {
-       struct mbuf *rxs_mbuf;          /* head of our mbuf chain */
-       bus_dmamap_t rxs_dmamap;        /* our DMA map */
-};
-
-struct desops;
-
-struct ave_softc {
-       device_t sc_dev;                /* generic device information */
-       bus_space_tag_t sc_st;          /* bus space tag */
-       bus_space_handle_t sc_sh;       /* bus space handle */
-       bus_size_t sc_mapsize;          /* csr map size */
-       bus_dma_tag_t sc_dmat;          /* bus DMA tag */
-       struct ethercom sc_ethercom;    /* Ethernet common data */
-       struct mii_data sc_mii;         /* MII */
-       callout_t sc_tick_ch;           /* PHY monitor callout */
-       int sc_flowflags;               /* 802.3x PAUSE flow control */
-       void *sc_ih;                    /* interrupt cookie */
-       int sc_phy_id;                  /* PHY address */
-       uint32_t sc_100mii;             /* 1<<27: RMII/MII, 0: RGMII */
-       uint32_t sc_rxc;                /* software copy of AVERXC */
-       int sc_model;                   /* 64 paddr model or otherwise 32 */
-
-       bus_dmamap_t sc_cddmamap;       /* control data DMA map */
-#define sc_cddma       sc_cddmamap->dm_segs[0].ds_addr
-
-       struct tdes *sc_txdescs;        /* PTR to tdes [NTXDESC] store */
-       struct rdes *sc_rxdescs;        /* PTR to rdes [NRXDESC] store */
-       struct tdes32 *sc_txd32;
-       struct rdes32 *sc_rxd32;
-       struct desops *sc_desops;       /* descriptor management */
-
-       struct ave_txsoft sc_txsoft[MD_TXQUEUELEN];
-       struct ave_rxsoft sc_rxsoft[MD_NRXDESC];
-       int sc_txfree;                  /* number of free Tx descriptors */
-       int sc_txnext;                  /* next ready Tx descriptor */
-       int sc_txsfree;                 /* number of free Tx jobs */
-       int sc_txsnext;                 /* next ready Tx job */
-       int sc_txsdirty;                /* dirty Tx jobs */
-       int sc_rxptr;                   /* next ready Rx descriptor/descsoft */
-       uint32_t sc_t0csum;             /* t0 field checksum designation */
-
-       krndsource_t rnd_source;        /* random source */
-};
-
-static int ave_fdt_match(device_t, cfdata_t, void *);
-static void ave_fdt_attach(device_t, device_t, void *);
-
-CFATTACH_DECL_NEW(ave_fdt, sizeof(struct ave_softc),
-    ave_fdt_match, ave_fdt_attach, NULL, NULL);
-
-static void ave_reset(struct ave_softc *);
-static int ave_init(struct ifnet *);
-static void ave_start(struct ifnet *);
-static void ave_stop(struct ifnet *, int);
-static void ave_watchdog(struct ifnet *);
-static int ave_ioctl(struct ifnet *, u_long, void *);
-static void ave_set_rcvfilt(struct ave_softc *);
-static void ave_write_filt(struct ave_softc *, int, const uint8_t *);
-static void ave_ifmedia_sts(struct ifnet *, struct ifmediareq *);
-static void mii_statchg(struct ifnet *);
-static void lnkchg(struct ave_softc *);
-static void phy_tick(void *);
-static int mii_readreg(device_t, int, int, uint16_t *);
-static int mii_writereg(device_t, int, int, uint16_t);
-static int ave_intr(void *);
-static void txreap(struct ave_softc *);
-static void rxintr(struct ave_softc *);
-static int add_rxbuf(struct ave_softc *, int);
-
-struct desops {
-       void (*make_tdes)(void *, int, int, int);
-       void (*mark_txfs)(void *, int);
-       void (*mark_txls)(void *, int);
-       void (*mark_txic)(void *, int);
-       int  (*read_tdes0)(void *, int);



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