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[src-draft/trunk]: src/sys/dev/usb Reduce gratious changes to -current, espec...
details: https://anonhg.NetBSD.org/src-all/rev/7536d95e5edc
branches: trunk
changeset: 361091:7536d95e5edc
user: Martin Husemann <martin%NetBSD.org@localhost>
date: Sat Jan 15 20:30:15 2022 +0100
description:
Reduce gratious changes to -current, especially sync delays
diffstat:
sys/dev/usb/if_urtwn.c | 89 ++++++++++++++++++-------------------------------
1 files changed, 33 insertions(+), 56 deletions(-)
diffs (truncated from 338 to 300 lines):
diff -r 02e9d0ee8650 -r 7536d95e5edc sys/dev/usb/if_urtwn.c
--- a/sys/dev/usb/if_urtwn.c Tue Dec 14 21:21:08 2021 +0100
+++ b/sys/dev/usb/if_urtwn.c Sat Jan 15 20:30:15 2022 +0100
@@ -246,7 +246,6 @@
static void urtwn_write_1(struct urtwn_softc *, uint16_t, uint8_t);
static void urtwn_write_2(struct urtwn_softc *, uint16_t, uint16_t);
static void urtwn_write_4(struct urtwn_softc *, uint16_t, uint32_t);
-static void urtwn_bb_write(struct urtwn_softc *, uint16_t, uint32_t);
static int urtwn_write_region(struct urtwn_softc *, uint16_t, uint8_t *,
int);
static int urtwn_read_region_1(struct urtwn_softc *, uint16_t, uint8_t *,
@@ -333,6 +332,7 @@
static void urtwn_update_mcast(struct ieee80211com *);
/* Aliases. */
+#define urtwn_bb_write urtwn_write_4
#define urtwn_bb_read urtwn_read_4
#define urtwn_lookup(d,v,p) ((const struct urtwn_dev *)usb_lookup(d,v,p))
@@ -748,13 +748,6 @@
tsleep(&sc->cmdq, 0, "endtask", 0);
}
-static void
-urtwn_bb_write(struct urtwn_softc *sc, uint16_t addr, uint32_t val)
-{
- urtwn_write_4(sc, addr, val);
- DELAY(1);
-}
-
static int
urtwn_write_region_1(struct urtwn_softc *sc, uint16_t addr, uint8_t *buf,
int len)
@@ -774,7 +767,6 @@
DPRINTFN(DBG_REG, ("%s: %s: error=%d: addr=%#x, len=%d\n",
device_xname(sc->sc_uw.uw_dev), __func__, error, addr, len));
}
- DELAY(1);
return error;
}
@@ -846,7 +838,6 @@
DPRINTFN(DBG_REG, ("%s: %s: error=%d: addr=%#x, len=%d\n",
device_xname(sc->sc_uw.uw_dev), __func__, error, addr, len));
}
- DELAY(1);
return error;
}
@@ -964,7 +955,6 @@
urtwn_bb_write(sc, R92C_LSSI_PARAM(chain),
SM(R92C_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));
- urtwn_delay_ms(sc, 1);
}
static void
@@ -974,7 +964,6 @@
urtwn_bb_write(sc, R92C_LSSI_PARAM(chain),
SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));
- urtwn_delay_ms(sc, 1);
}
static void
@@ -984,7 +973,6 @@
urtwn_bb_write(sc, R92C_LSSI_PARAM(chain),
SM(R88E_LSSI_PARAM_ADDR, addr) | SM(R92C_LSSI_PARAM_DATA, val));
- urtwn_delay_ms(sc, 1);
}
static uint32_t
@@ -1281,7 +1269,6 @@
sc->board_type, sc->regulatory));
IEEE80211_ADDR_COPY(ic->ic_macaddr, rom->macaddr);
-
sc->sc_rf_write = urtwn_r92c_rf_write;
sc->sc_power_on = urtwn_r92c_power_on;
sc->sc_dma_init = urtwn_r92c_dma_init;
@@ -1588,7 +1575,6 @@
}
sc->ledlink = on; /* Save LED state. */
}
- urtwn_delay_ms(sc, 1);
}
static void
@@ -3142,11 +3128,10 @@
R92C_APS_FSMCO_PDN_EN |
R92C_APS_FSMCO_PFM_ALDN);
- if (urtwn_read_4(sc, R92E_SYS_CFG1_8192E) & R92E_SPSLDO_SEL){
+ if (urtwn_read_4(sc, R92E_SYS_CFG1_8192E) & R92E_SPSLDO_SEL) {
/* LDO. */
urtwn_write_1(sc, R92E_LDO_SWR_CTRL, 0xc3);
- }
- else {
+ } else {
urtwn_write_2(sc, R92C_SYS_SWR_CTRL2, urtwn_read_2(sc,
R92C_SYS_SWR_CTRL2) & 0xffff);
urtwn_write_1(sc, R92E_LDO_SWR_CTRL, 0x83);
@@ -3155,37 +3140,37 @@
for (ntries = 0; ntries < 2; ntries++) {
urtwn_write_1(sc, R92C_AFE_PLL_CTRL,
urtwn_read_1(sc, R92C_AFE_PLL_CTRL));
- urtwn_write_2(sc, R92C_AFE_CTRL4, urtwn_read_2(sc,
- R92C_AFE_CTRL4));
+ urtwn_write_2(sc, R92C_AFE_CTRL4,
+ urtwn_read_2(sc, R92C_AFE_CTRL4));
}
/* Reset BB. */
urtwn_write_1(sc, R92C_SYS_FUNC_EN,
- urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB |
- R92C_SYS_FUNC_EN_BB_GLB_RST));
+ urtwn_read_1(sc, R92C_SYS_FUNC_EN) & ~(R92C_SYS_FUNC_EN_BBRSTB |
+ R92C_SYS_FUNC_EN_BB_GLB_RST));
urtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 2, urtwn_read_1(sc,
R92C_AFE_XTAL_CTRL + 2) | 0x80);
/* Disable HWPDN. */
- urtwn_write_2(sc, R92C_APS_FSMCO, urtwn_read_2(sc,
- R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
+ urtwn_write_2(sc, R92C_APS_FSMCO,
+ urtwn_read_2(sc, R92C_APS_FSMCO) & ~R92C_APS_FSMCO_APDM_HPDN);
/* Disable WL suspend. */
- urtwn_write_2(sc, R92C_APS_FSMCO, urtwn_read_2(sc,
- R92C_APS_FSMCO) & ~(R92C_APS_FSMCO_AFSM_PCIE |
- R92C_APS_FSMCO_AFSM_HSUS));
-
- urtwn_write_4(sc, R92C_APS_FSMCO, urtwn_read_4(sc,
- R92C_APS_FSMCO) | R92C_APS_FSMCO_RDY_MACON);
- urtwn_write_2(sc, R92C_APS_FSMCO, urtwn_read_2(sc,
- R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
+ urtwn_write_2(sc, R92C_APS_FSMCO,
+ urtwn_read_2(sc, R92C_APS_FSMCO) & ~(R92C_APS_FSMCO_AFSM_PCIE |
+ R92C_APS_FSMCO_AFSM_HSUS));
+
+ urtwn_write_4(sc, R92C_APS_FSMCO,
+ urtwn_read_4(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_RDY_MACON);
+ urtwn_write_2(sc, R92C_APS_FSMCO,
+ urtwn_read_2(sc, R92C_APS_FSMCO) | R92C_APS_FSMCO_APFM_ONMAC);
for (ntries = 0; ntries < 10000; ntries++) {
val = urtwn_read_2(sc, R92C_APS_FSMCO) &
- R92C_APS_FSMCO_APFM_ONMAC;
+ R92C_APS_FSMCO_APFM_ONMAC;
if (val == 0x0)
break;
- DELAY(10);
+ DELAY(260);
}
if (ntries == 10000) {
aprint_error_dev(sc->sc_uw.uw_dev,
@@ -3200,6 +3185,10 @@
R92C_CR_SCHEDULE_EN | R92C_CR_ENSEC;
urtwn_write_2(sc, R92C_CR, reg);
+ urtwn_write_1(sc, 0xfe10, 0x19);
+
+ urtwn_delay_ms(sc, 1);
+
return 0;
}
@@ -3343,7 +3332,6 @@
/* Force 8051 reset. */
urtwn_write_2(sc, R92C_SYS_FUNC_EN,
urtwn_read_2(sc, R92C_SYS_FUNC_EN) & ~R92C_SYS_FUNC_EN_CPUEN);
- urtwn_delay_ms(sc, 10);
}
static void
@@ -3358,24 +3346,24 @@
if (ISSET(sc->chip, URTWN_CHIP_92EU)) {
reg = urtwn_read_2(sc, R92C_RSV_CTRL) & ~R92E_RSV_MIO_EN;
urtwn_write_2(sc,R92C_RSV_CTRL, reg);
+ DELAY(50);
}
- DELAY(200);
reg = urtwn_read_2(sc, R92C_SYS_FUNC_EN);
urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg & ~R92C_SYS_FUNC_EN_CPUEN);
DELAY(50);
urtwn_write_2(sc, R92C_SYS_FUNC_EN, reg | R92C_SYS_FUNC_EN_CPUEN);
- DELAY(200);
+ DELAY(50);
if (ISSET(sc->chip, URTWN_CHIP_92EU)) {
reg = urtwn_read_2(sc, R92C_RSV_CTRL) | R92E_RSV_MIO_EN;
urtwn_write_2(sc,R92C_RSV_CTRL, reg);
+ DELAY(50);
}
+
/* Init firmware commands ring. */
sc->fwcur = 0;
- urtwn_delay_ms(sc, 10);
-
}
static int
@@ -3495,7 +3483,7 @@
/* Reset the FWDL checksum. */
urtwn_write_1(sc, R92C_MCUFWDL,
- urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT);
+ urtwn_read_1(sc, R92C_MCUFWDL) | R92C_MCUFWDL_CHKSUM_RPT);
DELAY(50);
/* download firmware */
@@ -3536,8 +3524,6 @@
if (ISSET(sc->chip, URTWN_CHIP_88E) ||
ISSET(sc->chip, URTWN_CHIP_92EU))
urtwn_r88e_fw_reset(sc);
- else
- urtwn_fw_reset(sc);
for (ntries = 0; ntries < 6000; ntries++) {
if (urtwn_read_4(sc, R92C_MCUFWDL) & R92C_MCUFWDL_WINTINI_RDY)
break;
@@ -3549,7 +3535,7 @@
error = ETIMEDOUT;
goto fail;
}
- urtwn_delay_ms(sc, 10);
+
fail:
firmware_free(fw, fwlen);
return error;
@@ -3811,6 +3797,7 @@
break;
}
urtwn_bb_write(sc, prog->regs[i], prog->vals[i]);
+ DELAY(1);
}
if (sc->chip & URTWN_CHIP_92C_1T2R) {
@@ -3855,12 +3842,15 @@
/* Write AGC values. */
for (i = 0; i < prog->agccount; i++) {
urtwn_bb_write(sc, R92C_OFDM0_AGCRSSITABLE, prog->agcvals[i]);
+ DELAY(1);
}
if (ISSET(sc->chip, URTWN_CHIP_88E) ||
ISSET(sc->chip, URTWN_CHIP_92EU)) {
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553422);
+ DELAY(1);
urtwn_bb_write(sc, R92C_OFDM0_AGCCORE1(0), 0x69553420);
+ DELAY(1);
}
if (ISSET(sc->chip, URTWN_CHIP_92EU)) {
@@ -3872,7 +3862,6 @@
urtwn_bb_write(sc, R92C_AFE_CTRL3,
RW(reg, R92C_AFE_XTAL_CTRL_ADDR,
crystalcap | crystalcap << 6));
- urtwn_delay_ms(sc, 1);
urtwn_write_4(sc, R92C_AFE_XTAL_CTRL, 0xf81fb);
} else if (ISSET(sc->chip, URTWN_CHIP_88E)) {
crystalcap = sc->r88e_rom[0xb9];
@@ -3889,7 +3878,6 @@
SET(sc->sc_uw.uw_flags, URTWN_FLAG_CCK_HIPWR);
}
}
- urtwn_delay_ms(sc, 1);
}
static void __noinline
@@ -3964,7 +3952,6 @@
/* Restore RF_ENV control type. */
reg = urtwn_bb_read(sc, R92C_FPGA0_RFIFACESW(idx)) & ~mask;
urtwn_bb_write(sc, R92C_FPGA0_RFIFACESW(idx), reg | saved);
- urtwn_delay_ms(sc, 1);
}
if ((sc->chip & (URTWN_CHIP_UMC_A_CUT | URTWN_CHIP_92C)) ==
@@ -4398,7 +4385,6 @@
for (i = 0; i < sc->nrxchains; i++) {
urtwn_rf_write(sc, i, R92C_RF_CHNLBW,
RW(sc->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan));
- urtwn_delay_ms(sc, 1);
}
if (ht40m) {
@@ -4461,7 +4447,6 @@
ISSET(sc->chip, URTWN_CHIP_92EU) ?
R88E_RF_CHNLBW_BW20 : R92C_RF_CHNLBW_BW20));
}
- urtwn_delay_ms(sc, 1);
}
static void __noinline
@@ -4521,11 +4506,9 @@
urtwn_bb_write(sc, R92C_HSSI_PARAM1(0),
urtwn_bb_read(sc, R92C_HSSI_PARAM1(0))|
R92C_HSSI_PARAM1_PI);
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