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[src/trunk]: src/sys/arch/sparc64/sparc64 try to handle ultrasparc III* "fast...



details:   https://anonhg.NetBSD.org/src/rev/ab7ee610d63b
branches:  trunk
changeset: 366164:ab7ee610d63b
user:      mrg <mrg%NetBSD.org@localhost>
date:      Mon May 16 21:28:05 2022 +0000

description:
try to handle ultrasparc III* "fast ecc error" traps.

i had a sunblade 2500 reset with this trap recently, and the
manual says it should have been recoverable.  in particular,
the US IIIv2 manual says in section 12.4.4.2 that the i-cache
won't see this data ever (so nothing needed there), and that
the d-cache needs to be disabled, and all the entries flushed,
and then re-enabled.

tested with a "trap 0x70" from kernel space, that trap.c
converted the "0x170" back to "0x70" (with an ADVANCE).  this
code not commited.

diffstat:

 sys/arch/sparc64/sparc64/cache.h  |   3 +-
 sys/arch/sparc64/sparc64/locore.s |  48 ++++++++++++++++++++++++++++++++++++--
 sys/arch/sparc64/sparc64/trap.c   |   9 +++++-
 3 files changed, 54 insertions(+), 6 deletions(-)

diffs (116 lines):

diff -r e5e324a5622d -r ab7ee610d63b sys/arch/sparc64/sparc64/cache.h
--- a/sys/arch/sparc64/sparc64/cache.h  Mon May 16 21:02:18 2022 +0000
+++ b/sys/arch/sparc64/sparc64/cache.h  Mon May 16 21:28:05 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache.h,v 1.30 2021/12/11 19:24:21 mrg Exp $ */
+/*     $NetBSD: cache.h,v 1.31 2022/05/16 21:28:05 mrg Exp $ */
 
 /*
  * Copyright (c) 2011 Matthew R. Green
@@ -93,6 +93,7 @@
 void   dcache_flush_page_us(paddr_t);  /* flush page from D$ */
 void   dcache_flush_page_usiii(paddr_t); /* flush page from D$ */
 void   sp_blast_dcache(int, int);      /* Clear entire D$ */
+void   sp_blast_dcache_disabled(int, int); /* Above with D$ disable. */
 void   blast_icache_us(void);          /* Clear entire I$ */
 void   blast_icache_usiii(void);       /* Clear entire I$ */
 
diff -r e5e324a5622d -r ab7ee610d63b sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Mon May 16 21:02:18 2022 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Mon May 16 21:28:05 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.s,v 1.427 2021/04/03 17:01:24 palle Exp $       */
+/*     $NetBSD: locore.s,v 1.428 2022/05/16 21:28:05 mrg Exp $ */
 
 /*
  * Copyright (c) 2006-2010 Matthew R. Green
@@ -6193,8 +6193,10 @@
 
 /*
  * sp_blast_dcache(int dcache_size, int dcache_line_size)
- *
- * Clear out all of D$ regardless of contents
+ * sp_blast_dcache_disabled(int dcache_size, int dcache_line_size)
+ *
+ * Clear out all of D$ regardless of contents.  The latter one also
+ * disables the D$ while doing so.
  */
        .align 8
 ENTRY(sp_blast_dcache)
@@ -6227,6 +6229,46 @@
         wrpr   %o3, %pstate
 #endif
 
+       .align 8
+ENTRY(sp_blast_dcache_disabled)
+/*
+ * We turn off interrupts for the duration to prevent RED exceptions.
+ */
+#ifdef PROF
+       save    %sp, -CC64FSZ, %sp
+#endif
+
+       rdpr    %pstate, %o3
+       sub     %o0, %o1, %o0
+       andn    %o3, PSTATE_IE, %o4                     ! Turn off PSTATE_IE bit
+       wrpr    %o4, 0, %pstate
+
+       ldxa    [%g0] ASI_MCCR, %o5
+       andn    %o5, MCCR_DCACHE_EN, %o4                ! Turn off the D$
+       stxa    %o4, [%g0] ASI_MCCR
+       flush   %g0
+
+1:
+       stxa    %g0, [%o0] ASI_DCACHE_TAG
+       membar  #Sync
+       brnz,pt %o0, 1b
+        sub    %o0, %o1, %o0
+
+       sethi   %hi(KERNBASE), %o2
+       flush   %o2
+       membar  #Sync
+
+       stxa    %o5, [%g0] ASI_MCCR                     ! Restore the D$
+       flush   %g0
+#ifdef PROF
+       wrpr    %o3, %pstate
+       ret
+        restore
+#else
+       retl
+        wrpr   %o3, %pstate
+#endif
+
 #ifdef MULTIPROCESSOR
 /*
  * void sparc64_ipi_blast_dcache(int dcache_size, int dcache_line_size)
diff -r e5e324a5622d -r ab7ee610d63b sys/arch/sparc64/sparc64/trap.c
--- a/sys/arch/sparc64/sparc64/trap.c   Mon May 16 21:02:18 2022 +0000
+++ b/sys/arch/sparc64/sparc64/trap.c   Mon May 16 21:28:05 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: trap.c,v 1.193 2021/02/02 08:18:42 martin Exp $ */
+/*     $NetBSD: trap.c,v 1.194 2022/05/16 21:28:05 mrg Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath.  All rights reserved.
@@ -50,7 +50,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.193 2021/02/02 08:18:42 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.194 2022/05/16 21:28:05 mrg Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -561,6 +561,11 @@
                } else if (type == T_ECCERR) {
                        ecc_corrected_error(type, pc);
                        return;
+               } else if (type == T_FAST_ECC_ERROR) {
+                       /* Disable D$, clear error, enable D$, continue. */
+                       membar_Sync();
+                       sp_blast_dcache_disabled(dcache_size, dcache_line_size);
+                       return;
                }
                goto dopanic;
        }



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