[src/trunk]: src/sys/arch - msipic_construct_msix_pic(): set mp_table_base to...

[bouyer <bouyer%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f0bfee595173
branches:  trunk
changeset: 366378:f0bfee595173
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Tue May 24 14:00:23 2022 +0000

description:
- msipic_construct_msix_pic(): set mp_table_base to memaddr (without
  table_offset), this is what Xen wants
while there use pci_conf_write16() in msi_set_msictl_enablebit() too,
for consistency (it seems that Xen accepts the 32bit write at this point,
but this may change).

- xen_map_msix_pirq(): don't forget to set map_irq.table_base in the
  MSI-X case, otherwise Xen maps it as MSI
- call pic_hwunmask() after pirq_establish() in msi/msix case, to make sure
  the msi-x vector is unmasked.

Now MSI-X works with Xen so stop disabling it in pci_attach_hook().

diffstat:

 sys/arch/x86/pci/msipic.c      |  10 +++++++---
 sys/arch/x86/pci/pci_machdep.c |  12 ++----------
 sys/arch/xen/x86/pintr.c       |   8 +++++---
 sys/arch/xen/x86/xen_intr.c    |   8 ++++++--
 4 files changed, 20 insertions(+), 18 deletions(-)

diffs (134 lines):

diff -r c0bf199d7c73 -r f0bfee595173 sys/arch/x86/pci/msipic.c
--- a/sys/arch/x86/pci/msipic.c Tue May 24 13:52:52 2022 +0000
+++ b/sys/arch/x86/pci/msipic.c Tue May 24 14:00:23 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: msipic.c,v 1.26 2022/05/23 15:03:05 bouyer Exp $       */
+/*     $NetBSD: msipic.c,v 1.27 2022/05/24 14:00:23 bouyer Exp $       */
 
 /*
  * Copyright (c) 2015 Internet Initiative Japan Inc.
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: msipic.c,v 1.26 2022/05/23 15:03:05 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: msipic.c,v 1.27 2022/05/24 14:00:23 bouyer Exp $");
 
 #include "opt_intrdebug.h"
 
@@ -356,7 +356,11 @@
        else
                ctl &= ~PCI_MSI_CTL_MSI_ENABLE;
 
+#ifdef XENPV
+       pci_conf_write16(pc, tag, off + PCI_MSI_CTL + 2, ctl >> 16);
+#else
        pci_conf_write(pc, tag, off, ctl);
+#endif
 }
 
 static void
@@ -771,7 +775,7 @@
        msix_pic->pic_msipic->mp_bstag = bstag;
        msix_pic->pic_msipic->mp_bshandle = bshandle;
        msix_pic->pic_msipic->mp_bssize = bssize;
-       msix_pic->pic_msipic->mp_i.mp_table_base = memaddr + table_offset;
+       msix_pic->pic_msipic->mp_i.mp_table_base = memaddr;
 
        return msix_pic;
 }
diff -r c0bf199d7c73 -r f0bfee595173 sys/arch/x86/pci/pci_machdep.c
--- a/sys/arch/x86/pci/pci_machdep.c    Tue May 24 13:52:52 2022 +0000
+++ b/sys/arch/x86/pci/pci_machdep.c    Tue May 24 14:00:23 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_machdep.c,v 1.90 2022/05/23 15:03:05 bouyer Exp $  */
+/*     $NetBSD: pci_machdep.c,v 1.91 2022/05/24 14:00:23 bouyer Exp $  */
 
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -73,7 +73,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.90 2022/05/23 15:03:05 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.91 2022/05/24 14:00:23 bouyer Exp $");
 
 #include <sys/types.h>
 #include <sys/param.h>
@@ -565,14 +565,6 @@
                }
        }
 
-#ifdef XENPV
-       /*
-        * XXX MSI-X doesn't work for XenPV yet - setup seems to be correct,
-        * XXX but no interrupts are actually delivered.
-        */
-       pba->pba_flags &= ~PCI_FLAGS_MSIX_OKAY;
-#endif
-
 #endif /* __HAVE_PCI_MSI_MSIX */
 }
 
diff -r c0bf199d7c73 -r f0bfee595173 sys/arch/xen/x86/pintr.c
--- a/sys/arch/xen/x86/pintr.c  Tue May 24 13:52:52 2022 +0000
+++ b/sys/arch/xen/x86/pintr.c  Tue May 24 14:00:23 2022 +0000
@@ -103,7 +103,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pintr.c,v 1.21 2022/05/23 15:03:05 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pintr.c,v 1.22 2022/05/24 14:00:23 bouyer Exp $");
 
 #include "opt_multiprocessor.h"
 #include "opt_xen.h"
@@ -234,9 +234,11 @@
        map_irq.pirq = -1;
        map_irq.bus = msi_i->mp_bus;
        map_irq.devfn = (msi_i->mp_dev << 3) | msi_i->mp_fun;
-       aprint_debug("xen_map_msix_pirq bus %d devfn 0x%x (%d %d) count %d",
+       map_irq.table_base = msi_i->mp_table_base;
+
+       aprint_debug("xen_map_msix_pirq bus %d devfn 0x%x (%d %d) count %d base 0x%lx",
            map_irq.bus, map_irq.devfn, msi_i->mp_dev, msi_i->mp_fun,
-           count);
+           count, map_irq.table_base);
 
        for (i = 0; i < count; i++) {
                map_irq.entry_nr = i;
diff -r c0bf199d7c73 -r f0bfee595173 sys/arch/xen/x86/xen_intr.c
--- a/sys/arch/xen/x86/xen_intr.c       Tue May 24 13:52:52 2022 +0000
+++ b/sys/arch/xen/x86/xen_intr.c       Tue May 24 14:00:23 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: xen_intr.c,v 1.29 2021/08/09 21:20:50 andvar Exp $     */
+/*     $NetBSD: xen_intr.c,v 1.30 2022/05/24 14:00:23 bouyer Exp $     */
 
 /*-
  * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.29 2021/08/09 21:20:50 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: xen_intr.c,v 1.30 2022/05/24 14:00:23 bouyer Exp $");
 
 #include "opt_multiprocessor.h"
 #include "opt_pci.h"
@@ -167,6 +167,8 @@
            "non-legacy IRQon i8259 ");
 
        gsi = xen_pic_to_gsi(pic, pin);
+       if (gsi < 0)
+               return NULL;
        KASSERTMSG(gsi < NR_EVENT_CHANNELS, "gsi %d >= NR_EVENT_CHANNELS %u",
            gsi, (int)NR_EVENT_CHANNELS);
 
@@ -195,6 +197,8 @@
        pih = pirq_establish(gsi, evtchn, handler, arg, level,
                             intrstr, xname, mpsafe);
        pih->pic = pic;
+       if (msipic_is_msi_pic(pic))
+               pic->pic_hwunmask(pic, pin);
        return pih;
 #endif /* NPCI > 0 || NISA > 0 */