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[src/trunk]: src/sys/arch Some devices (e.g. ixg in MSI-X mode) don't to have...



details:   https://anonhg.NetBSD.org/src/rev/6b29154f673f
branches:  trunk
changeset: 366382:6b29154f673f
user:      bouyer <bouyer%NetBSD.org@localhost>
date:      Tue May 24 15:55:19 2022 +0000

description:
Some devices (e.g. ixg in MSI-X mode) don't to have their handlers called
when no interrupt are pending. So add an extra ih_pending field
to struct intrhand, which is incremeted when the handler is not called because
of IPL level and reset to 0 when called. Check this in Xen's resume
assembly to call only handlers that are really pending.

diffstat:

 sys/arch/amd64/amd64/genassym.cf |   3 ++-
 sys/arch/amd64/amd64/vector.S    |   6 +++++-
 sys/arch/i386/i386/genassym.cf   |   3 ++-
 sys/arch/i386/i386/vector.S      |   8 ++++++--
 sys/arch/x86/include/intr.h      |   3 ++-
 sys/arch/xen/xen/evtchn.c        |  15 +++++++++++++--
 6 files changed, 30 insertions(+), 8 deletions(-)

diffs (160 lines):

diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/amd64/amd64/genassym.cf
--- a/sys/arch/amd64/amd64/genassym.cf  Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/amd64/amd64/genassym.cf  Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.85 2020/05/16 18:31:47 christos Exp $
+#      $NetBSD: genassym.cf,v 1.86 2022/05/24 15:55:19 bouyer Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -367,6 +367,7 @@
 
 ifdef XEN
 define CPU_INFO_VCPU           offsetof(struct cpu_info, ci_vcpu)
+define IH_PENDING              offsetof(struct intrhand, ih_pending)
 define SIR_XENIPL_VM           SIR_XENIPL_VM
 define SIR_XENIPL_SCHED                SIR_XENIPL_SCHED
 define SIR_XENIPL_HIGH         SIR_XENIPL_HIGH
diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/amd64/amd64/vector.S
--- a/sys/arch/amd64/amd64/vector.S     Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/amd64/amd64/vector.S     Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vector.S,v 1.77 2020/05/17 14:15:55 ad Exp $   */
+/*     $NetBSD: vector.S,v 1.78 2022/05/24 15:55:19 bouyer Exp $       */
 
 /*
  * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -712,9 +712,13 @@
        incl    CPUVAR(IDEPTH)                                          ;\
        movq    IS_HANDLERS(%r14),%rbx                                  ;\
 6:                                                                     \
+       cmpl    $0, IH_PENDING(%rbx)    /* is handler pending ? */      ;\
+       je      7f                      /* no */                        ;\
+       movl    $0, IH_PENDING(%rbx)                                    ;\
        movq    IH_ARG(%rbx),%rdi                                       ;\
        movq    %rsp,%rsi                                               ;\
        call    *IH_FUN(%rbx)           /* call it */                   ;\
+7:                                                                     \
        movq    IH_NEXT(%rbx),%rbx      /* next handler in chain */     ;\
        testq   %rbx,%rbx                                               ;\
        jnz     6b                                                      ;\
diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/i386/i386/genassym.cf
--- a/sys/arch/i386/i386/genassym.cf    Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/i386/i386/genassym.cf    Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: genassym.cf,v 1.122 2020/05/02 16:44:35 bouyer Exp $
+#      $NetBSD: genassym.cf,v 1.123 2022/05/24 15:55:19 bouyer Exp $
 
 #
 # Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -377,6 +377,7 @@
 
 ifdef XEN
 define CPU_INFO_VCPU           offsetof(struct cpu_info, ci_vcpu)
+define IH_PENDING              offsetof(struct intrhand, ih_pending)
 define SIR_XENIPL_VM           SIR_XENIPL_VM
 define SIR_XENIPL_SCHED                SIR_XENIPL_SCHED
 define SIR_XENIPL_HIGH         SIR_XENIPL_HIGH
diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/i386/i386/vector.S
--- a/sys/arch/i386/i386/vector.S       Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/i386/i386/vector.S       Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: vector.S,v 1.87 2020/05/17 14:15:55 ad Exp $   */
+/*     $NetBSD: vector.S,v 1.88 2022/05/24 15:55:19 bouyer Exp $       */
 
 /*
  * Copyright 2002 (c) Wasabi Systems, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <machine/asm.h>
-__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.87 2020/05/17 14:15:55 ad Exp $");
+__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.88 2022/05/24 15:55:19 bouyer Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -955,9 +955,13 @@
        STI(%eax)                                                       ;\
        movl    IS_HANDLERS(%ebp),%ebx                                  ;\
 6:                                                                     \
+       cmpl    $0, IH_PENDING(%ebx)    /* is handler pending ? */      ;\
+       je      7f                      /* no */                        ;\
+       movl    $0, IH_PENDING(%ebx)                                    ;\
        pushl   IH_ARG(%ebx)                                            ;\
        call    *IH_FUN(%ebx)           /* call it */                   ;\
        addl    $4,%esp                 /* toss the arg */              ;\
+7:                                                                     \
        movl    IH_NEXT(%ebx),%ebx      /* next handler in chain */     ;\
        testl   %ebx,%ebx                                               ;\
        jnz     6b                                                      ;\
diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/x86/include/intr.h
--- a/sys/arch/x86/include/intr.h       Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/x86/include/intr.h       Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intr.h,v 1.64 2022/04/04 19:33:45 andvar Exp $ */
+/*     $NetBSD: intr.h,v 1.65 2022/05/24 15:55:19 bouyer Exp $ */
 
 /*-
  * Copyright (c) 1998, 2001, 2006, 2007, 2008, 2019 The NetBSD Foundation, Inc.
@@ -142,6 +142,7 @@
        int     ih_pin;
        int     ih_slot;
 #if defined(XEN)
+       int     ih_pending;
        struct  intrhand *ih_evt_next;
 #endif
        struct cpu_info *ih_cpu;
diff -r 1c69dd22a5e3 -r 6b29154f673f sys/arch/xen/xen/evtchn.c
--- a/sys/arch/xen/xen/evtchn.c Tue May 24 15:51:10 2022 +0000
+++ b/sys/arch/xen/xen/evtchn.c Tue May 24 15:55:19 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: evtchn.c,v 1.97 2022/05/19 09:54:27 bouyer Exp $       */
+/*     $NetBSD: evtchn.c,v 1.98 2022/05/24 15:55:19 bouyer Exp $       */
 
 /*
  * Copyright (c) 2006 Manuel Bouyer.
@@ -54,7 +54,7 @@
 
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: evtchn.c,v 1.97 2022/05/19 09:54:27 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: evtchn.c,v 1.98 2022/05/24 15:55:19 bouyer Exp $");
 
 #include "opt_xen.h"
 #include "isa.h"
@@ -352,6 +352,11 @@
                hypervisor_set_ipending(evtsource[evtch]->ev_imask,
                                        evtch >> LONG_SHIFT,
                                        evtch & LONG_MASK);
+               ih = evtsource[evtch]->ev_handlers;
+               while (ih != NULL) {
+                       ih->ih_pending++;
+                       ih = ih->ih_evt_next;
+               }
 
                /* leave masked */
 
@@ -382,10 +387,15 @@
                        hypervisor_set_ipending(iplmask,
                            evtch >> LONG_SHIFT, evtch & LONG_MASK);
                        /* leave masked */
+                       while (ih != NULL) {
+                               ih->ih_pending++;
+                               ih = ih->ih_evt_next;
+                       }
                        goto splx;
                }
                iplmask &= ~(1 << XEN_IPL2SIR(ih->ih_level));
                ci->ci_ilevel = ih->ih_level;
+               ih->ih_pending = 0;
                ih_fun = (void *)ih->ih_fun;
                ih_fun(ih->ih_arg, regs);
                ih = ih->ih_evt_next;
@@ -891,6 +901,7 @@
        esh_args.ih->ih_arg = esh_args.ih->ih_realarg = arg;
        esh_args.ih->ih_evt_next = NULL;
        esh_args.ih->ih_next = NULL;
+       esh_args.ih->ih_pending = 0;
        esh_args.ih->ih_cpu = ci;
        esh_args.ih->ih_pin = evtch;
 #ifdef MULTIPROCESSOR



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