[src/trunk]: src/sys/arch/x86 x86: Move pl*_i, pl_i_roundup, and ptp_va2o out...

[riastradh <riastradh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4de6ecc0e262
branches:  trunk
changeset: 369529:4de6ecc0e262
user:      riastradh <riastradh%NetBSD.org@localhost>
date:      Sat Aug 20 23:18:51 2022 +0000

description:
x86: Move pl*_i, pl_i_roundup, and ptp_va2o out of x86/pmap.h.

- pl[1-4]_i -> x86/pte.h
- pl_i, pl_i_roundup, ptp_va2o -> x86/pmap.c

diffstat:

 sys/arch/x86/include/pmap.h |  37 +------------------------------------
 sys/arch/x86/include/pte.h  |  21 ++++++++++++++++++++-
 sys/arch/x86/x86/pmap.c     |  21 +++++++++++++++++++--
 3 files changed, 40 insertions(+), 39 deletions(-)

diffs (133 lines):

diff -r 139c1a71bd9e -r 4de6ecc0e262 sys/arch/x86/include/pmap.h
--- a/sys/arch/x86/include/pmap.h       Sat Aug 20 23:18:39 2022 +0000
+++ b/sys/arch/x86/include/pmap.h       Sat Aug 20 23:18:51 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.h,v 1.131 2022/08/20 23:18:20 riastradh Exp $     */
+/*     $NetBSD: pmap.h,v 1.132 2022/08/20 23:18:51 riastradh Exp $     */
 
 /*
  * Copyright (c) 1997 Charles D. Cranor and Washington University.
@@ -67,40 +67,6 @@
 #ifndef _X86_PMAP_H_
 #define        _X86_PMAP_H_
 
-/*
- * pl*_pi: index in the ptp page for a pde mapping a VA.
- * (pl*_i below is the index in the virtual array of all pdes per level)
- */
-#define pl1_pi(VA)     (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
-#define pl2_pi(VA)     (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
-#define pl3_pi(VA)     (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
-#define pl4_pi(VA)     (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
-#define pl_pi(va, lvl) \
-        (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
-
-/*
- * pl*_i: generate index into pde/pte arrays in virtual space
- *
- * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
- */
-#define pl1_i(VA)      (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
-#define pl2_i(VA)      (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
-#define pl3_i(VA)      (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
-#define pl4_i(VA)      (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
-#define pl_i(va, lvl) \
-        (((VA_SIGN_POS(va)) & ptp_frames[(lvl)-1]) >> ptp_shifts[(lvl)-1])
-
-#define        pl_i_roundup(va, lvl)   pl_i((va)+ ~ptp_frames[(lvl)-1], (lvl))
-
-/*
- * PTP macros:
- *   a PTP's index is the PD index of the PDE that points to it
- *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
- *   a PTP's VA is the first VA mapped by that PTP
- */
-
-#define ptp_va2o(va, lvl)      (pl_i(va, (lvl)+1) * PAGE_SIZE)
-
 /* size of a PDP: usually one page, except for PAE */
 #ifdef PAE
 #define PDP_SIZE 4
@@ -108,7 +74,6 @@
 #define PDP_SIZE 1
 #endif
 
-
 #if defined(_KERNEL)
 #include <sys/kcpuset.h>
 #include <sys/rwlock.h>
diff -r 139c1a71bd9e -r 4de6ecc0e262 sys/arch/x86/include/pte.h
--- a/sys/arch/x86/include/pte.h        Sat Aug 20 23:18:39 2022 +0000
+++ b/sys/arch/x86/include/pte.h        Sat Aug 20 23:18:51 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pte.h,v 1.5 2020/09/05 07:26:37 maxv Exp $     */
+/*     $NetBSD: pte.h,v 1.6 2022/08/20 23:18:51 riastradh Exp $        */
 
 /*
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -49,4 +49,23 @@
 #define PGEX_PK                0x0020  /* access disallowed by protection key */
 #define PGEX_SGX       0x8000  /* violation of sgx-specific access rights */
 
+/*
+ * pl*_pi: index in the ptp page for a pde mapping a VA.
+ * (pl*_i below is the index in the virtual array of all pdes per level)
+ */
+#define pl1_pi(VA)     (((VA_SIGN_POS(VA)) & L1_MASK) >> L1_SHIFT)
+#define pl2_pi(VA)     (((VA_SIGN_POS(VA)) & L2_MASK) >> L2_SHIFT)
+#define pl3_pi(VA)     (((VA_SIGN_POS(VA)) & L3_MASK) >> L3_SHIFT)
+#define pl4_pi(VA)     (((VA_SIGN_POS(VA)) & L4_MASK) >> L4_SHIFT)
+#define pl_pi(va, lvl) \
+        (((VA_SIGN_POS(va)) & ptp_masks[(lvl)-1]) >> ptp_shifts[(lvl)-1])
+
+/*
+ * pl*_i: generate index into pde/pte arrays in virtual space
+ */
+#define pl1_i(VA)      (((VA_SIGN_POS(VA)) & L1_FRAME) >> L1_SHIFT)
+#define pl2_i(VA)      (((VA_SIGN_POS(VA)) & L2_FRAME) >> L2_SHIFT)
+#define pl3_i(VA)      (((VA_SIGN_POS(VA)) & L3_FRAME) >> L3_SHIFT)
+#define pl4_i(VA)      (((VA_SIGN_POS(VA)) & L4_FRAME) >> L4_SHIFT)
+
 #endif /* _X86_PTE_H */
diff -r 139c1a71bd9e -r 4de6ecc0e262 sys/arch/x86/x86/pmap.c
--- a/sys/arch/x86/x86/pmap.c   Sat Aug 20 23:18:39 2022 +0000
+++ b/sys/arch/x86/x86/pmap.c   Sat Aug 20 23:18:51 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.c,v 1.417 2022/08/20 23:15:37 riastradh Exp $     */
+/*     $NetBSD: pmap.c,v 1.418 2022/08/20 23:18:51 riastradh Exp $     */
 
 /*
  * Copyright (c) 2008, 2010, 2016, 2017, 2019, 2020 The NetBSD Foundation, Inc.
@@ -130,7 +130,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.417 2022/08/20 23:15:37 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.418 2022/08/20 23:18:51 riastradh Exp $");
 
 #include "opt_user_ldt.h"
 #include "opt_lockdebug.h"
@@ -281,6 +281,23 @@
        /* nothing */
 };
 
+/*
+ * pl_i(va, X) == plX_i(va) <= pl_i_roundup(va, X)
+ */
+#define pl_i(va, lvl) \
+        (((VA_SIGN_POS(va)) & ptp_frames[(lvl)-1]) >> ptp_shifts[(lvl)-1])
+
+#define        pl_i_roundup(va, lvl)   pl_i((va)+ ~ptp_frames[(lvl)-1], (lvl))
+
+/*
+ * PTP macros:
+ *   a PTP's index is the PD index of the PDE that points to it
+ *   a PTP's offset is the byte-offset in the PTE space that this PTP is at
+ *   a PTP's VA is the first VA mapped by that PTP
+ */
+
+#define ptp_va2o(va, lvl)      (pl_i(va, (lvl)+1) * PAGE_SIZE)
+
 const vaddr_t ptp_masks[] = PTP_MASK_INITIALIZER;
 const vaddr_t ptp_frames[] = PTP_FRAME_INITIALIZER;
 const int ptp_shifts[] = PTP_SHIFT_INITIALIZER;