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[src/trunk]: src/sys/arch/aarch64/aarch64 Bss clearing is now done at the beg...
details: https://anonhg.NetBSD.org/src/rev/3d7f2a6a5631
branches: trunk
changeset: 369602:3d7f2a6a5631
user: ryo <ryo%NetBSD.org@localhost>
date: Tue Aug 23 05:31:12 2022 +0000
description:
Bss clearing is now done at the beginning of start.S.
Some `__attribute__((__section__(".data")))' hack will no longer be needed.
diffstat:
sys/arch/aarch64/aarch64/locore.S | 18 ++----------------
sys/arch/aarch64/aarch64/start.S | 17 +++++++++++++++--
2 files changed, 17 insertions(+), 18 deletions(-)
diffs (84 lines):
diff -r 0e2885746a60 -r 3d7f2a6a5631 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Tue Aug 23 05:29:44 2022 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Tue Aug 23 05:31:12 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $ */
+/* $NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,7 +38,7 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.86 2022/05/06 06:09:50 ryo Exp $")
+RCSID("$NetBSD: locore.S,v 1.87 2022/08/23 05:31:12 ryo Exp $")
#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
@@ -93,8 +93,6 @@
adrl x0, bootstk
mov sp, x0
- bl clear_bss
-
PRINT("boot NetBSD/aarch64\n")
bl 1f
@@ -238,18 +236,6 @@
.align 2
-ASENTRY_NP(clear_bss)
- /* Zero the BSS. The size must be aligned 16, usually it should be. */
- adrl x14, __bss_start__
- adrl x15, __bss_end__
- b 2f
-1: stp xzr, xzr, [x14], #16
-2: cmp x14, x15
- b.lo 1b
- ret
-ASEND(clear_bss)
-
-
init_sysregs:
stp x0, lr, [sp, #-16]!
diff -r 0e2885746a60 -r 3d7f2a6a5631 sys/arch/aarch64/aarch64/start.S
--- a/sys/arch/aarch64/aarch64/start.S Tue Aug 23 05:29:44 2022 +0000
+++ b/sys/arch/aarch64/aarch64/start.S Tue Aug 23 05:31:12 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $ */
+/* $NetBSD: start.S,v 1.13 2022/08/23 05:31:12 ryo Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -33,7 +33,7 @@
#include <aarch64/asm.h>
#include "assym.h"
-RCSID("$NetBSD: start.S,v 1.12 2022/08/23 05:29:44 ryo Exp $")
+RCSID("$NetBSD: start.S,v 1.13 2022/08/23 05:31:12 ryo Exp $")
/*
* Padding at start of kernel image to make room for 64-byte header
@@ -81,6 +81,19 @@
br x9
9:
+
+ /*
+ * Zero the BSS
+ */
+ adrl x8, __bss_start__
+ adrl x9, __bss_end__
+ /* while (x8 < x9) *(uint128_t *)x8++ = 0; */
+ b 2f
+1: stp xzr, xzr, [x8], #16
+2: cmp x8, x9
+ b.lo 1b
+
+
mrs x8, CurrentEL
lsr x8, x8, #2
cmp x8, #0x2
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