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[src/trunk]: src/sys/arch/powerpc/fpu Fix logic for FPSCR[UX]:



details:   https://anonhg.NetBSD.org/src/rev/90787c8768ed
branches:  trunk
changeset: 370061:90787c8768ed
user:      rin <rin%NetBSD.org@localhost>
date:      Wed Sep 14 05:54:07 2022 +0000

description:
Fix logic for FPSCR[UX]:
- Correct FPSCR[FPRF] field when round to 0.0 or 0.0f.
- Simplify.

diffstat:

 sys/arch/powerpc/fpu/fpu_implode.c |  25 +++++++++++++++++--------
 1 files changed, 17 insertions(+), 8 deletions(-)

diffs (55 lines):

diff -r d8ca51844fea -r 90787c8768ed sys/arch/powerpc/fpu/fpu_implode.c
--- a/sys/arch/powerpc/fpu/fpu_implode.c        Wed Sep 14 01:05:42 2022 +0000
+++ b/sys/arch/powerpc/fpu/fpu_implode.c        Wed Sep 14 05:54:07 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $ */
+/*     $NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -46,7 +46,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.22 2022/09/04 13:17:33 rin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.23 2022/09/14 05:54:07 rin Exp $");
 
 #include <sys/types.h>
 #include <sys/systm.h>
@@ -397,10 +397,14 @@
                        *cx |= FPRF_SIGN(sign);
                        return (sign | SNG_EXP(1) | 0);
                }
+               if (*cx & FPSCR_FI) {
+                       *cx |= FPSCR_UX;
+                       if (fp->fp_mant[3] == 0) {
+                               *cx |= FPSCR_FE;
+                               return sign;
+                       }
+               }
                *cx |= FPSCR_C | FPRF_SIGN(sign);
-               if (((fe->fe_cx | *cx) & FPSCR_FI) ||
-                   (fe->fe_fpscr & FPSCR_UX))
-                       *cx |= FPSCR_UX;
                return (sign | SNG_EXP(0) | fp->fp_mant[3]);
        }
        /* -FP_NG for g,r; -1 for implied 1; -SNG_FRACBITS for fraction */
@@ -466,10 +470,15 @@
                        *cx |= FPRF_SIGN(sign);
                        return HI_WORD(sign | DBL_EXP(1) | 0);
                }
+               if (*cx & FPSCR_FI) {
+                       *cx |= FPSCR_UX;
+                       if ((fp->fp_mant[2] & DBL_MASK) == 0 &&
+                            fp->fp_mant[3] == 0) {
+                               *cx |= FPSCR_FE;
+                               return HI_WORD(sign);
+                       }
+               }
                *cx |= FPSCR_C | FPRF_SIGN(sign);
-               if (((fe->fe_cx | *cx) & FPSCR_FI) ||
-                   (fe->fe_fpscr & FPSCR_UX))
-                       *cx |= FPSCR_UX;
                exp = 0;
                goto done;
        }



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