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[src/trunk]: src/sys/arch/x86/pci amdsmn(4),amdzentemp(4): Add support for 17...



details:   https://anonhg.NetBSD.org/src/rev/255428eee184
branches:  trunk
changeset: 371257:255428eee184
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Sat Oct 01 15:50:05 2022 +0000

description:
amdsmn(4),amdzentemp(4): Add support for 17h/6xh and 19h/6xh.

diffstat:

 sys/arch/x86/pci/amdsmn.c     |  14 ++++++++++++--
 sys/arch/x86/pci/amdzentemp.c |  16 ++++++++++++----
 2 files changed, 24 insertions(+), 6 deletions(-)

diffs (104 lines):

diff -r ed57f8c04dff -r 255428eee184 sys/arch/x86/pci/amdsmn.c
--- a/sys/arch/x86/pci/amdsmn.c Sat Oct 01 15:45:20 2022 +0000
+++ b/sys/arch/x86/pci/amdsmn.c Sat Oct 01 15:50:05 2022 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: amdsmn.c,v 1.13 2022/04/27 06:59:25 msaitoh Exp $      */
+/*     $NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $      */
 
 /*-
  * Copyright (c) 2017, 2019 Conrad Meyer <cem%FreeBSD.org@localhost>
@@ -29,7 +29,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.13 2022/04/27 06:59:25 msaitoh Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdsmn.c,v 1.14 2022/10/01 15:50:05 msaitoh Exp $ ");
 
 /*
  * Driver for the AMD Family 15h (model 60+) and 17h CPU
@@ -88,10 +88,20 @@
                .amdsmn_data_reg = F17H_SMN_DATA_REG,
        },
        {
+               .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_6X_RC,
+               .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+               .amdsmn_data_reg = F17H_SMN_DATA_REG,
+       },
+       {
                .amdsmn_deviceid = PCI_PRODUCT_AMD_F17_7X_RC,
                .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
                .amdsmn_data_reg = F17H_SMN_DATA_REG,
        },
+       {
+               .amdsmn_deviceid = PCI_PRODUCT_AMD_F19_6X_RC,
+               .amdsmn_addr_reg = F17H_SMN_ADDR_REG,
+               .amdsmn_data_reg = F17H_SMN_DATA_REG,
+       },
 };
 
 static int amdsmn_match(device_t, cfdata_t, void *);
diff -r ed57f8c04dff -r 255428eee184 sys/arch/x86/pci/amdzentemp.c
--- a/sys/arch/x86/pci/amdzentemp.c     Sat Oct 01 15:45:20 2022 +0000
+++ b/sys/arch/x86/pci/amdzentemp.c     Sat Oct 01 15:50:05 2022 +0000
@@ -1,4 +1,4 @@
-/*      $NetBSD: amdzentemp.c,v 1.14 2021/06/06 11:35:22 nonaka Exp $ */
+/*      $NetBSD: amdzentemp.c,v 1.15 2022/10/01 15:50:05 msaitoh Exp $ */
 /*      $OpenBSD: kate.c,v 1.2 2008/03/27 04:52:03 cnst Exp $   */
 
 /*
@@ -53,7 +53,7 @@
 
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.14 2021/06/06 11:35:22 nonaka Exp $ ");
+__KERNEL_RCSID(0, "$NetBSD: amdzentemp.c,v 1.15 2022/10/01 15:50:05 msaitoh Exp $ ");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -114,6 +114,7 @@
        size_t sc_sensor_len;
        size_t sc_numsensors;
        int32_t sc_offset;
+       uint32_t sc_ccd_tmp_base;
 };
 
 enum {
@@ -345,7 +346,7 @@
                /* Tccd */
                i = edata->private - CCD_BASE;
                error = amdsmn_read(sc->sc_smn,
-                   AMD_17H_CCD_TMP_BASE + (i * sizeof(temp)), &temp);
+                   sc->sc_ccd_tmp_base + (i * sizeof(temp)), &temp);
                if (error || !ISSET(temp, AMD_17H_CCD_TMP_VALID)) {
                        edata->state = ENVSYS_SINVALID;
                        return;
@@ -399,6 +400,10 @@
        case 0x20 ... 0x2f: /* Zen3 Ryzen "Vermeer" */
                maxreg = 8;
                break;
+       case 0x60 ... 0x6f: /* Zen4 Ryzen "Raphael" */
+               sc->sc_ccd_tmp_base = 0x59b08;
+               maxreg = 8;
+               break;
        default:
                aprint_error_dev(sc->sc_dev,
                    "Unrecognized Family 19h Model: %02xh\n", model);
@@ -413,6 +418,9 @@
 {
        int nccd;
 
+       /* Set default CCD temp sensor base address. */
+       sc->sc_ccd_tmp_base = 0x59954;
+
        switch (family) {
        case 0x17:
                nccd = amdzentemp_probe_ccd_sensors17h(sc, model);
@@ -437,7 +445,7 @@
 
        for (i = 0; i < sc->sc_numsensors - 1; i++) {
                error = amdsmn_read(sc->sc_smn,
-                   AMD_17H_CCD_TMP_BASE + (i * sizeof(temp)), &temp);
+                   sc->sc_ccd_tmp_base + (i * sizeof(temp)), &temp);
                if (error || !ISSET(temp, AMD_17H_CCD_TMP_VALID))
                        continue;
 



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