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[src/trunk]: src/sys add pcie capability and read request size linux compat, ...
details: https://anonhg.NetBSD.org/src/rev/45f6587a8f8b
branches: trunk
changeset: 371916:45f6587a8f8b
user: mrg <mrg%NetBSD.org@localhost>
date: Mon Oct 17 03:05:32 2022 +0000
description:
add pcie capability and read request size linux compat, some pci root support
implement support for:
- pcie_capability_read_dword()
- pcie_capability_read_word()
- pcie_capability_write_dword()
- pcie_capability_write_word()
- pcie_get_readrq()
- pcie_set_readrq()
implement the "struct pci_dev" bus->self member by creating a minimal fake
"struct pci_dev" for the pci bus itself. this is kind of gross. it checks
that the current device's parent is a netbsd "pci" device, and that it has
a (grand) parent "ppb" device, and then fills in the fake device based upon
the pci and ppb devices.
add some PCIE_LCSR2_TGT_LSPEED encodings, and map them to linux names.
map several other PCIE_LCSR and PCIE_LCAP names.
uncomment several pcie code segments in radeon and amdgpu. (not sure that
we can test the amdgpu_si.c change, as we use the radeon version and the
amdgpu version hangs on the one machine i have.)
tested on amdgpu (RX550) and radeon (7750 & 3650).
ok @riastradh
diffstat:
sys/dev/pci/pcireg.h | 5 +-
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c | 6 +-
sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_si.c | 10 +-
sys/external/bsd/drm2/dist/drm/radeon/radeon_cik.c | 6 +-
sys/external/bsd/drm2/dist/drm/radeon/radeon_si.c | 6 +-
sys/external/bsd/drm2/include/linux/pci.h | 33 ++-
sys/external/bsd/drm2/linux/linux_pci.c | 202 ++++++++++++++++-
7 files changed, 244 insertions(+), 24 deletions(-)
diffs (truncated from 506 to 300 lines):
diff -r 7936b857fe08 -r 45f6587a8f8b sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/dev/pci/pcireg.h Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcireg.h,v 1.167 2022/10/01 12:40:42 rin Exp $ */
+/* $NetBSD: pcireg.h,v 1.168 2022/10/17 03:05:32 mrg Exp $ */
/*
* Copyright (c) 1995, 1996, 1999, 2000
@@ -1186,6 +1186,9 @@
#define PCIE_LCAP2_DRS __BIT(31) /* DRS Supported */
#define PCIE_LCSR2 0x30 /* Link Control & Status 2 Register */
#define PCIE_LCSR2_TGT_LSPEED __BITS(3, 0) /* Target Link Speed */
+#define PCIE_LCSR2_TGT_LSPEED_2_5G 0x1 /* 2.5GT/s supported */
+#define PCIE_LCSR2_TGT_LSPEED_5G 0x2 /* 5.0GT/s supported */
+#define PCIE_LCSR2_TGT_LSPEED_8G 0x3 /* 8.0GT/s supported */
#define PCIE_LCSR2_ENT_COMPL __BIT(4) /* Enter Compliance */
#define PCIE_LCSR2_HW_AS_DIS __BIT(5) /* HW Autonomous Speed Disabl */
#define PCIE_LCSR2_SEL_DEEMP __BIT(6) /* Selectable De-emphasis */
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c
--- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_cik.c Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_cik.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $ */
+/* $NetBSD: amdgpu_cik.c,v 1.6 2022/10/17 03:05:32 mrg Exp $ */
/*
* Copyright 2012 Advanced Micro Devices, Inc.
@@ -24,7 +24,7 @@
* Authors: Alex Deucher
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_cik.c,v 1.5 2021/12/19 10:59:01 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_cik.c,v 1.6 2022/10/17 03:05:32 mrg Exp $");
#include <linux/firmware.h>
#include <linux/slab.h>
@@ -1461,7 +1461,6 @@
static void cik_pcie_gen3_enable(struct amdgpu_device *adev)
{
-#ifndef __NetBSD__ /* XXX amdgpu pcie */
struct pci_dev *root = adev->pdev->bus->self;
u32 speed_cntl, current_data_rate;
int i;
@@ -1644,7 +1643,6 @@
break;
udelay(1);
}
-#endif
}
static void cik_program_aspm(struct amdgpu_device *adev)
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_si.c
--- a/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_si.c Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/dist/drm/amd/amdgpu/amdgpu_si.c Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: amdgpu_si.c,v 1.3 2021/12/19 12:21:29 riastradh Exp $ */
+/* $NetBSD: amdgpu_si.c,v 1.4 2022/10/17 03:05:32 mrg Exp $ */
/*
* Copyright 2015 Advanced Micro Devices, Inc.
@@ -24,7 +24,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: amdgpu_si.c,v 1.3 2021/12/19 12:21:29 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: amdgpu_si.c,v 1.4 2022/10/17 03:05:32 mrg Exp $");
#include <linux/firmware.h>
#include <linux/slab.h>
@@ -1656,7 +1656,6 @@
static void si_pcie_gen3_enable(struct amdgpu_device *adev)
{
-#ifndef __NetBSD__ /* XXX amdgpu pcie */
struct pci_dev *root = adev->pdev->bus->self;
u32 speed_cntl, current_data_rate;
int i;
@@ -1827,7 +1826,6 @@
break;
udelay(1);
}
-#endif /* __NetBSD__ */
}
static inline u32 si_pif_phy0_rreg(struct amdgpu_device *adev, u32 reg)
@@ -2002,9 +2000,6 @@
if (!disable_clkreq &&
!pci_is_root_bus(adev->pdev->bus)) {
-#ifdef __NetBSD__ /* XXX amdgpu pcie */
- clk_req_support = false;
-#else
struct pci_dev *root = adev->pdev->bus->self;
u32 lnkcap;
@@ -2012,7 +2007,6 @@
pcie_capability_read_dword(root, PCI_EXP_LNKCAP, &lnkcap);
if (lnkcap & PCI_EXP_LNKCAP_CLKPM)
clk_req_support = true;
-#endif
} else {
clk_req_support = false;
}
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/dist/drm/radeon/radeon_cik.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_cik.c Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_cik.c Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: radeon_cik.c,v 1.6 2021/12/19 09:54:20 riastradh Exp $ */
+/* $NetBSD: radeon_cik.c,v 1.7 2022/10/17 03:05:32 mrg Exp $ */
/*
* Copyright 2012 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_cik.c,v 1.6 2021/12/19 09:54:20 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_cik.c,v 1.7 2022/10/17 03:05:32 mrg Exp $");
#include <linux/firmware.h>
#include <linux/module.h>
@@ -9564,7 +9564,6 @@
static void cik_pcie_gen3_enable(struct radeon_device *rdev)
{
-#ifndef __NetBSD__ /* XXX radeon pcie */
struct pci_dev *root = rdev->pdev->bus->self;
enum pci_bus_speed speed_cap;
u32 speed_cntl, current_data_rate;
@@ -9747,7 +9746,6 @@
break;
udelay(1);
}
-#endif
}
static void cik_program_aspm(struct radeon_device *rdev)
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/dist/drm/radeon/radeon_si.c
--- a/sys/external/bsd/drm2/dist/drm/radeon/radeon_si.c Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/dist/drm/radeon/radeon_si.c Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: radeon_si.c,v 1.4 2021/12/19 09:56:27 riastradh Exp $ */
+/* $NetBSD: radeon_si.c,v 1.5 2022/10/17 03:05:32 mrg Exp $ */
/*
* Copyright 2011 Advanced Micro Devices, Inc.
@@ -25,7 +25,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: radeon_si.c,v 1.4 2021/12/19 09:56:27 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: radeon_si.c,v 1.5 2022/10/17 03:05:32 mrg Exp $");
#include <linux/firmware.h>
#include <linux/module.h>
@@ -7099,7 +7099,6 @@
static void si_pcie_gen3_enable(struct radeon_device *rdev)
{
-#ifndef __NetBSD__ /* XXX radeon pcie */
struct pci_dev *root = rdev->pdev->bus->self;
enum pci_bus_speed speed_cap;
u32 speed_cntl, current_data_rate;
@@ -7283,7 +7282,6 @@
break;
udelay(1);
}
-#endif
}
static void si_program_aspm(struct radeon_device *rdev)
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/include/linux/pci.h
--- a/sys/external/bsd/drm2/include/linux/pci.h Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/include/linux/pci.h Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci.h,v 1.54 2022/09/20 23:01:42 mrg Exp $ */
+/* $NetBSD: pci.h,v 1.55 2022/10/17 03:05:32 mrg Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -49,6 +49,7 @@
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/agpvar.h>
+#include <dev/pci/ppbvar.h>
#include <linux/device.h>
#include <linux/dma-mapping.h>
@@ -60,6 +61,7 @@
struct acpi_devnode;
struct pci_driver;
+struct pci_dev;
struct pci_bus {
/* NetBSD private members */
@@ -68,6 +70,8 @@
/* Linux API */
u_int number;
+
+ struct pci_dev *self;
};
struct pci_device_id {
@@ -133,6 +137,21 @@
#define PCI_CAP_ID_AGP PCI_CAP_AGP
+#define PCI_EXP_LNKCTL PCIE_LCSR
+#define PCI_EXP_LNKCTL_HAWD PCIE_LCSR_HAWD
+#define PCI_EXP_DEVSTA (PCIE_DCSR + 2)
+#define PCI_EXP_DEVSTA_TRPND (PCIE_DCSR_TRANSACTION_PND >> 16)
+#define PCI_EXP_LNKCTL2 PCIE_LCAP2
+#define PCI_EXP_LNKCTL2_ENTER_COMP PCIE_LCSR2_ENT_COMPL
+#define PCI_EXP_LNKCTL2_TX_MARGIN PCIE_LCSR2_TX_MARGIN
+#define PCI_EXP_LNKCTL2_TLS PCIE_LCSR2_TGT_LSPEED
+#define PCI_EXP_LNKCTL2_TLS_2_5GT PCIE_LCSR2_TGT_LSPEED_2_5G
+#define PCI_EXP_LNKCTL2_TLS_5_0GT PCIE_LCSR2_TGT_LSPEED_5G
+#define PCI_EXP_LNKCTL2_TLS_8_0GT PCIE_LCSR2_TGT_LSPEED_8G
+#define PCI_EXP_LNKCAP PCIE_LCAP
+#define PCI_EXP_LNKCAP_CLKPM PCIE_LCAP_CLOCK_PM
+
+
typedef int pci_power_t;
#define PCI_D0 0
@@ -262,6 +281,10 @@
#define pcibios_align_resource linux_pcibios_align_resource
#define pcie_get_speed_cap linux_pcie_get_speed_cap
#define pcie_bandwidth_available linux_pcie_bandwidth_available
+#define pcie_read_config_dword linux_pcie_capability_read_dword
+#define pcie_read_config_word linux_pcie_capability_read_word
+#define pcie_write_config_dword linux_pcie_capability_write_dword
+#define pcie_write_config_word linux_pcie_capability_write_word
/* NetBSD local additions. */
void linux_pci_dev_init(struct pci_dev *, device_t, device_t,
@@ -292,6 +315,11 @@
int pci_write_config_word(struct pci_dev *, int, uint16_t);
int pci_write_config_byte(struct pci_dev *, int, uint8_t);
+int pcie_capability_read_dword(struct pci_dev *, int, uint32_t *);
+int pcie_capability_read_word(struct pci_dev *, int, uint16_t *);
+int pcie_capability_write_dword(struct pci_dev *, int, uint32_t);
+int pcie_capability_write_word(struct pci_dev *, int, uint16_t);
+
int pci_bus_read_config_dword(struct pci_bus *, unsigned, int,
uint32_t *);
int pci_bus_read_config_word(struct pci_bus *, unsigned, int,
@@ -310,6 +338,9 @@
void pci_set_master(struct pci_dev *);
void pci_clear_master(struct pci_dev *);
+int pcie_get_readrq(struct pci_dev *);
+int pcie_set_readrq(struct pci_dev *, int);
+
bus_addr_t pcibios_align_resource(void *, const struct resource *,
bus_addr_t, bus_size_t);
int pci_bus_alloc_resource(struct pci_bus *, struct resource *,
diff -r 7936b857fe08 -r 45f6587a8f8b sys/external/bsd/drm2/linux/linux_pci.c
--- a/sys/external/bsd/drm2/linux/linux_pci.c Sun Oct 16 23:38:02 2022 +0000
+++ b/sys/external/bsd/drm2/linux/linux_pci.c Mon Oct 17 03:05:32 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: linux_pci.c,v 1.24 2022/09/20 23:01:42 mrg Exp $ */
+/* $NetBSD: linux_pci.c,v 1.25 2022/10/17 03:05:32 mrg Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -35,7 +35,7 @@
#endif
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: linux_pci.c,v 1.24 2022/09/20 23:01:42 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: linux_pci.c,v 1.25 2022/10/17 03:05:32 mrg Exp $");
#if NACPICA > 0
#include <dev/acpi/acpivar.h>
@@ -73,6 +73,74 @@
return device_xname(pci_dev_dev(pdev));
}
+/*
+ * Setup enough of a parent that we can access config space.
+ * This is gross and grovels pci(4) and ppb(4) internals.
+ */
+static struct pci_dev *
+alloc_fake_parent_device(device_t parent, const struct pci_attach_args *pa)
+{
+
+ if (parent == NULL || !device_is_a(parent, "pci"))
+ return NULL;
+
+ device_t pparent = device_parent(parent);
+ if (pparent == NULL || !device_is_a(pparent, "ppb"))
+ return NULL;
+
+ struct pci_softc *pcisc = device_private(parent);
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