[src/trunk]: src/sys/arch/riscv/riscv Restore t5 and t6 from the correct loca...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6fd60f59a0a0
branches:  trunk
changeset: 372519:6fd60f59a0a0
user:      skrll <skrll%NetBSD.org@localhost>
date:      Sun Dec 04 16:29:35 2022 +0000

description:
Restore t5 and t6 from the correct locations in exception_kernexit.

>From Simon.

diffstat:

 sys/arch/riscv/riscv/cpu_switch.S |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (20 lines):

diff -r c984fcbc26b6 -r 6fd60f59a0a0 sys/arch/riscv/riscv/cpu_switch.S
--- a/sys/arch/riscv/riscv/cpu_switch.S Sun Dec 04 16:23:48 2022 +0000
+++ b/sys/arch/riscv/riscv/cpu_switch.S Sun Dec 04 16:29:35 2022 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu_switch.S,v 1.1 2022/10/14 07:58:30 skrll Exp $ */
+/* $NetBSD: cpu_switch.S,v 1.2 2022/12/04 16:29:35 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -278,8 +278,8 @@
        REG_L   t2, TF_T2(sp)           // restore t2
        REG_L   t3, TF_T3(sp)           // restore t3
        REG_L   t4, TF_T4(sp)           // restore t4
-       REG_L   t5, TF_T3(sp)           // restore t5
-       REG_L   t6, TF_T4(sp)           // restore t6
+       REG_L   t5, TF_T5(sp)           // restore t5
+       REG_L   t6, TF_T6(sp)           // restore t6
 
        REG_L   t0, TF_PC(sp)           // fetch exception PC
        REG_L   t1, TF_SR(sp)           // fetch status