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[src/trunk]: src/sys/arch/next68k/dev Misc KNF and cosmetics.
details: https://anonhg.NetBSD.org/src/rev/30b2d74f0717
branches: trunk
changeset: 373343:30b2d74f0717
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Fri Feb 03 23:06:42 2023 +0000
description:
Misc KNF and cosmetics.
diffstat:
sys/arch/next68k/dev/nextdma.c | 426 +++++++++++++++++++++----------------
sys/arch/next68k/dev/nextdmareg.h | 40 +-
sys/arch/next68k/dev/nextdmavar.h | 12 +-
3 files changed, 270 insertions(+), 208 deletions(-)
diffs (truncated from 1023 to 300 lines):
diff -r 8e68fa7be4f2 -r 30b2d74f0717 sys/arch/next68k/dev/nextdma.c
--- a/sys/arch/next68k/dev/nextdma.c Fri Feb 03 23:04:35 2023 +0000
+++ b/sys/arch/next68k/dev/nextdma.c Fri Feb 03 23:06:42 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: nextdma.c,v 1.50 2017/03/31 08:38:13 msaitoh Exp $ */
+/* $NetBSD: nextdma.c,v 1.51 2023/02/03 23:06:42 tsutsui Exp $ */
/*
* Copyright (c) 1998 Darrin B. Jewell
* All rights reserved.
@@ -25,11 +25,11 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: nextdma.c,v 1.50 2017/03/31 08:38:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: nextdma.c,v 1.51 2023/02/03 23:06:42 tsutsui Exp $");
#include <sys/param.h>
#include <sys/systm.h>
-#include <sys/mbuf.h>
+#include <sys/mbuf.h>
#include <sys/syslog.h>
#include <sys/socket.h>
#include <sys/device.h>
@@ -168,14 +168,32 @@
static struct nextdma_channel nextdma_channel[] = {
#if NESP > 0
- { "scsi", NEXT_P_SCSI_CSR, DD_SIZE, NEXT_I_SCSI_DMA, &nextdma_esp_intr },
+ {
+ "scsi",
+ NEXT_P_SCSI_CSR,
+ DD_SIZE,
+ NEXT_I_SCSI_DMA,
+ &nextdma_esp_intr
+ },
#endif
#if NXE > 0
- { "enetx", NEXT_P_ENETX_CSR, DD_SIZE, NEXT_I_ENETX_DMA, &nextdma_enet_intr },
- { "enetr", NEXT_P_ENETR_CSR, DD_SIZE, NEXT_I_ENETR_DMA, &nextdma_enet_intr },
+ {
+ "enetx",
+ NEXT_P_ENETX_CSR,
+ DD_SIZE,
+ NEXT_I_ENETX_DMA,
+ &nextdma_enet_intr
+ },
+ {
+ "enetr",
+ NEXT_P_ENETR_CSR,
+ DD_SIZE,
+ NEXT_I_ENETR_DMA,
+ &nextdma_enet_intr
+ },
#endif
};
-static int nnextdma_channels = (sizeof(nextdma_channel)/sizeof(nextdma_channel[0]));
+static int nnextdma_channels = __arraycount(nextdma_channel);
static int attached = 0;
@@ -206,11 +224,11 @@
struct intio_attach_args *ia = (struct intio_attach_args *)aux;
if (attached >= nnextdma_channels)
- return (0);
+ return 0;
ia->ia_addr = (void *)nextdma_channel[attached].nd_base;
- return (1);
+ return 1;
}
void
@@ -229,22 +247,20 @@
nsc->sc_bst = ia->ia_bst;
if (bus_space_map(nsc->sc_bst, nsc->sc_chan->nd_base,
- nsc->sc_chan->nd_size, 0, &nsc->sc_bsh)) {
+ nsc->sc_chan->nd_size, 0, &nsc->sc_bsh)) {
panic("%s: can't map DMA registers for channel %s",
- device_xname(self), nsc->sc_chan->nd_name);
+ device_xname(self), nsc->sc_chan->nd_name);
}
- nextdma_init (nsc);
+ nextdma_init(nsc);
isrlink_autovec(nsc->sc_chan->nd_intrfunc, nsc,
- NEXT_I_IPL(nsc->sc_chan->nd_intr), 10, NULL);
+ NEXT_I_IPL(nsc->sc_chan->nd_intr), 10, NULL);
INTR_ENABLE(nsc->sc_chan->nd_intr);
- printf (": channel %d (%s)\n", attached,
+ printf(": channel %d (%s)\n", attached,
nsc->sc_chan->nd_name);
attached++;
-
- return;
}
void
@@ -257,7 +273,7 @@
snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS,
NEXT_I_BIT(nsc->sc_chan->nd_intr));
printf("DMA init ipl (%ld) intr(%s)\n",
- NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf);
+ NEXT_I_IPL(nsc->sc_chan->nd_intr), sbuf);
}
#endif
@@ -267,8 +283,8 @@
nsc->sc_stat.nd_idx_cont = 0;
nsc->sc_stat.nd_exception = 0;
- nd_bsw4 (DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE);
- nd_bsw4 (DD_CSR, 0);
+ nd_bsw4(DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE);
+ nd_bsw4(DD_CSR, 0);
#if 01
nextdma_setup_curr_regs(nsc);
@@ -287,10 +303,10 @@
*/
state &= (DMACSR_COMPLETE | DMACSR_SUPDATE | DMACSR_ENABLE);
#else
- state &= (DMACSR_BUSEXC | DMACSR_COMPLETE |
+ state &= (DMACSR_BUSEXC | DMACSR_COMPLETE |
DMACSR_SUPDATE | DMACSR_ENABLE);
#endif
- if (state) {
+ if (state != 0) {
nextdma_print(nsc);
panic("DMA did not reset");
}
@@ -309,17 +325,19 @@
DPRINTF(("DMA reset\n"));
#if (defined(ND_DEBUG))
- if (NEXTDMA_DEBUG > 1) nextdma_print(nsc);
+ if (NEXTDMA_DEBUG > 1)
+ nextdma_print(nsc);
#endif
- nd_bsw4 (DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET);
+ nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET);
if ((stat->nd_map) || (stat->nd_map_cont)) {
if (stat->nd_map_cont) {
- DPRINTF(("DMA: resetting with non null continue map\n"));
- if (nsc->sc_conf.nd_completed_cb)
- (*nsc->sc_conf.nd_completed_cb)
- (stat->nd_map_cont, nsc->sc_conf.nd_cb_arg);
-
+ DPRINTF(
+ ("DMA: resetting with non null continue map\n"));
+ if (nsc->sc_conf.nd_completed_cb)
+ (*nsc->sc_conf.nd_completed_cb)(
+ stat->nd_map_cont, nsc->sc_conf.nd_cb_arg);
+
stat->nd_map_cont = 0;
stat->nd_idx_cont = 0;
}
@@ -335,7 +353,8 @@
/****************************************************************/
-/* Call the completed and continue callbacks to try to fill
+/*
+ * Call the completed and continue callbacks to try to fill
* in the dma continue buffers.
*/
void
@@ -343,19 +362,19 @@
{
struct nextdma_status *stat = &nsc->sc_stat;
- NDTRACEIF (ndtrace_addc('r'));
+ NDTRACEIF(ndtrace_addc('r'));
DPRINTF(("DMA nextdma_rotate()\n"));
/* Rotate the continue map into the current map */
stat->nd_map = stat->nd_map_cont;
stat->nd_idx = stat->nd_idx_cont;
- if ((!stat->nd_map_cont) ||
+ if ((stat->nd_map_cont == NULL) ||
((++stat->nd_idx_cont >= stat->nd_map_cont->dm_nsegs))) {
- if (nsc->sc_conf.nd_continue_cb) {
+ if (nsc->sc_conf.nd_continue_cb != NULL) {
stat->nd_map_cont = (*nsc->sc_conf.nd_continue_cb)
(nsc->sc_conf.nd_cb_arg);
- if (stat->nd_map_cont) {
+ if (stat->nd_map_cont != NULL) {
stat->nd_map_cont->dm_xfer_len = 0;
}
} else {
@@ -366,12 +385,14 @@
#if defined(DIAGNOSTIC) && 0
if (stat->nd_map_cont) {
- if (!DMA_BEGINALIGNED(stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr)) {
+ if (!DMA_BEGINALIGNED(
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr)) {
nextdma_print(nsc);
panic("DMA request unaligned at start");
}
- if (!DMA_ENDALIGNED(stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr +
- stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len)) {
+ if (!DMA_ENDALIGNED(
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr +
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len)) {
nextdma_print(nsc);
panic("DMA request unaligned at end");
}
@@ -389,16 +410,17 @@
bus_addr_t dd_saved_limit;
struct nextdma_status *stat = &nsc->sc_stat;
- NDTRACEIF (ndtrace_addc('C'));
+ NDTRACEIF(ndtrace_addc('C'));
DPRINTF(("DMA nextdma_setup_curr_regs()\n"));
- if (stat->nd_map) {
+ if (stat->nd_map != NULL) {
dd_next = stat->nd_map->dm_segs[stat->nd_idx].ds_addr;
dd_limit = (stat->nd_map->dm_segs[stat->nd_idx].ds_addr +
stat->nd_map->dm_segs[stat->nd_idx].ds_len);
if (!turbo && nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA) {
- dd_limit |= 0x80000000; /* Ethernet transmit needs secret magic */
+ /* Ethernet transmit needs secret magic */
+ dd_limit |= 0x80000000;
dd_limit += 15;
}
} else {
@@ -409,25 +431,28 @@
dd_saved_next = dd_next;
dd_saved_limit = dd_limit;
- NDTRACEIF (if (stat->nd_map) {
- ndtrace_printf("%ld", stat->nd_map->dm_segs[stat->nd_idx].ds_len);
+ NDTRACEIF(if (stat->nd_map) {
+ ndtrace_printf("%ld",
+ stat->nd_map->dm_segs[stat->nd_idx].ds_len);
});
if (!turbo && (nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA)) {
- nd_bsw4 (DD_NEXT_INITBUF, dd_next);
+ nd_bsw4(DD_NEXT_INITBUF, dd_next);
} else {
- nd_bsw4 (DD_NEXT, dd_next);
+ nd_bsw4(DD_NEXT, dd_next);
}
- nd_bsw4 (DD_LIMIT, dd_limit);
- if (!turbo) nd_bsw4 (DD_SAVED_NEXT, dd_saved_next);
- if (!turbo) nd_bsw4 (DD_SAVED_LIMIT, dd_saved_limit);
+ nd_bsw4(DD_LIMIT, dd_limit);
+ if (!turbo)
+ nd_bsw4(DD_SAVED_NEXT, dd_saved_next);
+ if (!turbo)
+ nd_bsw4(DD_SAVED_LIMIT, dd_saved_limit);
#ifdef DIAGNOSTIC
- if ((nd_bsr4 (DD_NEXT_INITBUF) != dd_next)
- || (nd_bsr4 (DD_NEXT) != dd_next)
- || (nd_bsr4 (DD_LIMIT) != dd_limit)
- || (!turbo && (nd_bsr4 (DD_SAVED_NEXT) != dd_saved_next))
- || (!turbo && (nd_bsr4 (DD_SAVED_LIMIT) != dd_saved_limit))
+ if ((nd_bsr4(DD_NEXT_INITBUF) != dd_next)
+ || (nd_bsr4(DD_NEXT) != dd_next)
+ || (nd_bsr4(DD_LIMIT) != dd_limit)
+ || (!turbo && (nd_bsr4(DD_SAVED_NEXT) != dd_saved_next))
+ || (!turbo && (nd_bsr4(DD_SAVED_LIMIT) != dd_saved_limit))
) {
nextdma_print(nsc);
panic("DMA failure writing to current regs");
@@ -444,42 +469,48 @@
bus_addr_t dd_saved_stop;
struct nextdma_status *stat = &nsc->sc_stat;
- NDTRACEIF (ndtrace_addc('c'));
+ NDTRACEIF(ndtrace_addc('c'));
DPRINTF(("DMA nextdma_setup_regs()\n"));
- if (stat->nd_map_cont) {
- dd_start = stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr;
- dd_stop = (stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr +
- stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len);
+ if (stat->nd_map_cont != NULL) {
+ dd_start =
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr;
+ dd_stop =
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_addr +
+ stat->nd_map_cont->dm_segs[stat->nd_idx_cont].ds_len;
if (!turbo && nsc->sc_chan->nd_intr == NEXT_I_ENETX_DMA) {
- dd_stop |= 0x80000000; /* Ethernet transmit needs secret magic */
+ /* Ethernet transmit needs secret magic */
+ dd_stop |= 0x80000000;
dd_stop += 15;
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