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[src/trunk]: src/sys/arch/next68k Remove leftover "last kernel PT page" setti...
details: https://anonhg.NetBSD.org/src/rev/aa3387f16e16
branches: trunk
changeset: 373353:aa3387f16e16
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Sat Feb 04 08:42:45 2023 +0000
description:
Remove leftover "last kernel PT page" settings derived from hp300.
Whilehere, also remove VM definitions for obsolete COMPAT_HPUX stuff.
All hp300 machines has RAMs at a region from the highest address
i.e. 0xFFFFFFFF to smaller address (as HP claims "it's the MSB first"),
so kernels have to prepare PA==KVA mappings as the "last PT page" to
guarantee the running kernel works both before and after the MMU is
turned on. For such a special mapping, we have to set up necessary
segment table and page table during early startup, in pmap_bootstrap()
invoked from locore.s.
On the other hand, NeXT machines have RAMs at a region from 0x40000000
to below (i.e. to larger address) so we still need a PA==KVA mapping.
However currently NetBSD/next68k just uses the transparent translation
registers to achieve the PA==KVA mapping, so unlike hp300 we don't have
to prepare special segment table and page table for it.
Note many other m68k ports (like luna68k, news68k, x68k etc.) have
RAMs at a region from 0x00000000 so usually we can assume PA==KVA
and don't have to bother to prepare such speicial mappings.
No user visible changes (except now freed wasted pages for the tables).
Tested on my NeXTstation slab.
diffstat:
sys/arch/next68k/include/param.h | 4 +-
sys/arch/next68k/include/vmparam.h | 16 +-----
sys/arch/next68k/next68k/locore.s | 20 ++++----
sys/arch/next68k/next68k/pmap_bootstrap.c | 63 ++++--------------------------
4 files changed, 25 insertions(+), 78 deletions(-)
diffs (264 lines):
diff -r 736fad6cfd23 -r aa3387f16e16 sys/arch/next68k/include/param.h
--- a/sys/arch/next68k/include/param.h Sat Feb 04 07:07:41 2023 +0000
+++ b/sys/arch/next68k/include/param.h Sat Feb 04 08:42:45 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: param.h,v 1.12 2012/02/10 17:35:48 para Exp $ */
+/* $NetBSD: param.h,v 1.13 2023/02/04 08:42:45 tsutsui Exp $ */
/*
* Copyright (c) 1988 University of Utah.
@@ -50,7 +50,7 @@
#define PGSHIFT 12 /* LOG2(NBPG) */
#define KERNBASE 0x00000000 /* start of kernel virtual */
-#define UPAGES 3 /* pages of u-area */
+#define UPAGES 2 /* pages of u-area */
#include <m68k/param.h>
diff -r 736fad6cfd23 -r aa3387f16e16 sys/arch/next68k/include/vmparam.h
--- a/sys/arch/next68k/include/vmparam.h Sat Feb 04 07:07:41 2023 +0000
+++ b/sys/arch/next68k/include/vmparam.h Sat Feb 04 08:42:45 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: vmparam.h,v 1.28 2021/12/05 04:54:21 msaitoh Exp $ */
+/* $NetBSD: vmparam.h,v 1.29 2023/02/04 08:42:45 tsutsui Exp $ */
/*
* This file was taken from mvme68k/include/vmparam.h and
@@ -59,16 +59,8 @@
/*
* USRSTACK is the top (end) of the user stack.
- *
- * NOTE: the ONLY reason that HIGHPAGES is 0x100 instead of UPAGES (3)
- * is for HPUX compatibility. Why?? Because HPUX's debuggers
- * have the user's stack hard-wired at FFF00000 for post-mortems,
- * and we must be compatible...
*/
-#define USRSTACK (-HIGHPAGES*PAGE_SIZE) /* Start of user stack */
-#define BTOPUSRSTACK (0x100000-HIGHPAGES) /* btop(USRSTACK) */
-#define P1PAGES 0x100000
-#define HIGHPAGES (0x100000/PAGE_SIZE)
+#define USRSTACK VM_MAXUSER_ADDRESS /* Start of user stack */
/*
* Virtual memory related constants, all in bytes
@@ -106,7 +98,7 @@
#define VM_MAXUSER_ADDRESS ((vaddr_t)0xFFF00000)
#define VM_MAX_ADDRESS ((vaddr_t)0xFFF00000)
#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0)
-#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)(0-PAGE_SIZE*NPTEPG*2))
+#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)(0-PAGE_SIZE*NPTEPG))
/* virtual sizes (bytes) for various kernel submaps */
#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE)
@@ -131,4 +123,4 @@
struct pv_header *pvheader; /* pv table for this seg */
};
-#endif /* _MVME68K_VMPARAM_H_ */
+#endif /* _NEXT68K_VMPARAM_H_ */
diff -r 736fad6cfd23 -r aa3387f16e16 sys/arch/next68k/next68k/locore.s
--- a/sys/arch/next68k/next68k/locore.s Sat Feb 04 07:07:41 2023 +0000
+++ b/sys/arch/next68k/next68k/locore.s Sat Feb 04 08:42:45 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.70 2023/02/04 07:07:41 tsutsui Exp $ */
+/* $NetBSD: locore.s,v 1.71 2023/02/04 08:42:45 tsutsui Exp $ */
/*
* Copyright (c) 1998 Darrin B. Jewell
@@ -320,11 +320,11 @@
* Prepare to enable MMU.
* Since the kernel is not mapped logical == physical we must insure
* that when the MMU is turned on, all prefetched addresses (including
- * the PC) are valid. In order guarantee that, we use the last physical
- * page (which is conveniently mapped == VA) and load it up with enough
- * code to defeat the prefetch, then we execute the jump back to here.
- *
- * Is this all really necessary, or am I paranoid??
+ * the PC) are valid. In order guarantee that, we use the transparent
+ * translation registers (which provide PA == VA mappings) and just
+ * turns on the MMU, then jump from the VA == PA address (at 0x40XXXXXX)
+ * to the actual kernel virtual address (at 0x00XXXXXX) code via a far
+ * jump instruction so that we can defeat the prefetch.
*/
RELOC(Sysseg_pa, %a0) | system segment table addr
movl %a0@,%d1 | read value (a PA)
@@ -358,9 +358,9 @@
cmpl #MMU_68040,%a0@ | 68040?
jne Lmotommu2 | no, skip
- | This is a hack to get PA=KVA when turning on MMU
- | it will only work on 68040's. We should fix something
- | to boot 68030's later.
+ | This is a hack to get PA=KVA when turning on MMU as mentioned above.
+ | Currintly this will only work on 68040's. We should also provide
+ | %tt0 and %tt1 settings to boot 68030's later.
movel #0x0200c040,%d0 | intio devices are at 0x02000000
.long 0x4e7b0004 | movc %d0,%itt0
.long 0x4e7b0006 | movc %d0,%dtt0
@@ -420,7 +420,7 @@
movc %d0,%cacr | clear cache(s)
jra Lenab3
Ltbia040:
- .word 0xf518
+ .word 0xf518 | pflusha
Lenab3:
jbsr _C_LABEL(next68k_init)
diff -r 736fad6cfd23 -r aa3387f16e16 sys/arch/next68k/next68k/pmap_bootstrap.c
--- a/sys/arch/next68k/next68k/pmap_bootstrap.c Sat Feb 04 07:07:41 2023 +0000
+++ b/sys/arch/next68k/next68k/pmap_bootstrap.c Sat Feb 04 08:42:45 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_bootstrap.c,v 1.44 2016/12/23 10:48:12 maya Exp $ */
+/* $NetBSD: pmap_bootstrap.c,v 1.45 2023/02/04 08:42:45 tsutsui Exp $ */
/*
* This file was taken from mvme68k/mvme68k/pmap_bootstrap.c
@@ -45,7 +45,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.44 2016/12/23 10:48:12 maya Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.45 2023/02/04 08:42:45 tsutsui Exp $");
#include "opt_m68k_arch.h"
@@ -100,7 +100,6 @@
pmap_bootstrap(paddr_t nextpa, paddr_t firstpa)
{
paddr_t lwp0upa, kstpa, kptmpa, kptpa;
- paddr_t lkptpa;
u_int nptpages, kstsize;
st_entry_t protoste, *ste, *este;
pt_entry_t protopte, *pte, *epte;
@@ -156,8 +155,6 @@
*
* kptmpa kernel PT map 1 page
*
- * lkptpa last kernel PT page 1 page
- *
* kptpa statically allocated
* kernel PT pages Sysptsize+ pages
*
@@ -180,8 +177,6 @@
nextpa += kstsize * PAGE_SIZE;
kptmpa = nextpa;
nextpa += PAGE_SIZE;
- lkptpa = nextpa;
- nextpa += PAGE_SIZE;
kptpa = nextpa;
nptpages = RELOC(Sysptsize, int) + howmany(RELOC(physmem, int), NPTEPG) +
(IIOMAPSIZE + MONOMAPSIZE + COLORMAPSIZE + NPTEPG - 1) / NPTEPG;
@@ -207,18 +202,8 @@
* each mapping 256kb. Note that there may be additional "segment
* table" pages depending on how large MAXKL2SIZE is.
*
- * Portions of the last two segment of KVA space (0xFF800000 -
- * 0xFFFFFFFF) are mapped for a couple of purposes.
- * The first segment (0xFF800000 - 0xFFBFFFFF) is mapped
- * for the kernel page tables.
- *
- * XXX: It looks this was copied from hp300 and not sure if
- * XXX: last physical page mapping is really needed on this port.
- * The very last page (0xFFFFF000) in the second segment is mapped
- * to the last physical page of RAM to give us a region in which
- * PA == VA. We use the first part of this page for enabling
- * and disabling mapping. The last part of this page also contains
- * info left by the boot ROM.
+ * Portions of the last segment of KVA space (0xFFC00000 -
+ * 0xFFFFFFFF) are mapped for the kernel page tables.
*
* XXX cramming two levels of mapping into the single "segment"
* table on the 68040 is intended as a temporary hack to get things
@@ -276,23 +261,17 @@
*ste = protoste;
/*
* Now initialize the final portion of that block of
- * descriptors to map Sysmap and the "last PT page".
+ * descriptors to map Sysmap.
*/
i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE);
ste = (st_entry_t *)kstpa;
- ste = &ste[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE) * 2];
+ ste = &ste[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)];
este = &ste[NPTEPG / SG4_LEV3SIZE];
protoste = kptmpa | SG_U | SG_RW | SG_V;
while (ste < este) {
*ste++ = protoste;
protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
}
- este = &ste[NPTEPG / SG4_LEV3SIZE];
- protoste = lkptpa | SG_U | SG_RW | SG_V;
- while (ste < este) {
- *ste++ = protoste;
- protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
- }
/*
* Calculate the free level 2 descriptor mask
* noting that we have used:
@@ -305,7 +284,7 @@
/* mark entries for map page tables */
for (i = 1; i <= nl1desc; i++)
stfree &= ~l2tobm(i);
- /* mark an entry for kptmpa and lkptpa */
+ /* mark an entry for kptmpa */
stfree &= ~l2tobm(i);
/* mark entries not available */
for (i = MAXKL2SIZE; i < sizeof(stfree) * NBBY; i++)
@@ -330,14 +309,11 @@
*pte++ = PG_NV;
}
/*
- * Initialize the last ones to point to Sysptmap and the page
- * table page allocated earlier.
+ * Initialize the last one to point to Sysptmap.
*/
pte = (pt_entry_t *)kptmpa;
pte = &pte[SYSMAP_VA >> SEGSHIFT];
*pte = kptmpa | PG_RW | PG_CI | PG_V;
- pte++; /* XXX should use [MAXADDR >> SEGSHIFT] */
- *pte = lkptpa | PG_RW | PG_CI | PG_U | PG_V;
} else
#endif /* M68040 || M68060 */
{
@@ -368,8 +344,7 @@
while (pte < epte)
*pte++ = PG_NV;
/*
- * Initialize the last ones to point to Sysptmap and the page
- * table page allocated earlier.
+ * Initialize the last one to point to Sysptmap.
*/
ste = (st_entry_t *)kstpa;
ste = &ste[SYSMAP_VA >> SEGSHIFT];
@@ -377,29 +352,9 @@
pte = &pte[SYSMAP_VA >> SEGSHIFT];
*ste = kptmpa | SG_RW | SG_V;
*pte = kptmpa | PG_RW | PG_CI | PG_V;
- ste++; /* XXX should use [MAXADDR >> SEGSHIFT] */
- pte++; /* XXX should use [MAXADDR >> SEGSHIFT] */
- *ste = lkptpa | SG_RW | SG_V;
- *pte = lkptpa | PG_RW | PG_CI | PG_V;
}
/*
- * Invalidate all but the final entry in the last kernel PT page.
- * The final entry maps the last page of physical memory to
- * prepare a page that is PA == VA to turn on the MMU.
- *
- * XXX: This looks copied from hp300 where PA != VA, but
- * XXX: it's suspicious if this is also required on this port.
- */
- pte = (pt_entry_t *)lkptpa;
- epte = &pte[NPTEPG - 1];
- while (pte < epte)
- *pte++ = PG_NV;
-#ifdef MAXADDR
- /* tmp double-map for CPUs with physmem at the end of memory */
- *pte = MAXADDR | PG_RW | PG_CI | PG_U | PG_V;
-#endif
- /*
* Initialize kernel page table.
* Start by invalidating the `nptpages' that we have allocated.
*/
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