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[src/trunk]: src/sys/arch/next68k/dev Misc cleanup.
details: https://anonhg.NetBSD.org/src/rev/175ef2737cdc
branches: trunk
changeset: 373346:175ef2737cdc
user: tsutsui <tsutsui%NetBSD.org@localhost>
date: Fri Feb 03 23:16:07 2023 +0000
description:
Misc cleanup.
- use C99 designated initializer
- misc KNF
- TAB/space cleanup
diffstat:
sys/arch/next68k/dev/esp.c | 444 +++++++++++++++++++++++------------------
sys/arch/next68k/dev/espreg.h | 4 +-
sys/arch/next68k/dev/espvar.h | 4 +-
3 files changed, 251 insertions(+), 201 deletions(-)
diffs (truncated from 1215 to 300 lines):
diff -r bf5be95fd6df -r 175ef2737cdc sys/arch/next68k/dev/esp.c
--- a/sys/arch/next68k/dev/esp.c Fri Feb 03 23:13:00 2023 +0000
+++ b/sys/arch/next68k/dev/esp.c Fri Feb 03 23:16:07 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: esp.c,v 1.65 2023/01/27 15:31:05 tsutsui Exp $ */
+/* $NetBSD: esp.c,v 1.66 2023/02/03 23:16:07 tsutsui Exp $ */
/*-
* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
@@ -75,7 +75,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.65 2023/01/27 15:31:05 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: esp.c,v 1.66 2023/02/03 23:16:07 tsutsui Exp $");
#include <sys/types.h>
#include <sys/param.h>
@@ -134,7 +134,7 @@
void esp_dmacb_completed(bus_dmamap_t, void *);
void esp_dmacb_shutdown(void *);
-static void findchannel_defer(device_t);
+static void findchannel_defer(device_t);
#ifdef ESP_DEBUG
char esp_dma_dump[5*1024] = "";
@@ -167,18 +167,23 @@
int esp_dma_isactive(struct ncr53c9x_softc *);
struct ncr53c9x_glue esp_glue = {
- esp_read_reg,
- esp_write_reg,
- esp_dma_isintr,
- esp_dma_reset,
- esp_dma_intr,
- esp_dma_setup,
- esp_dma_go,
- esp_dma_stop,
- esp_dma_isactive,
- NULL, /* gl_clear_latched_intr */
+ .gl_read_reg = esp_read_reg,
+ .gl_write_reg = esp_write_reg,
+ .gl_dma_isintr = esp_dma_isintr,
+ .gl_dma_reset = esp_dma_reset,
+ .gl_dma_intr = esp_dma_intr,
+ .gl_dma_setup = esp_dma_setup,
+ .gl_dma_go = esp_dma_go,
+ .gl_dma_stop = esp_dma_stop,
+ .gl_dma_isactive = esp_dma_isactive,
+ .gl_clear_latched_intr = NULL
};
+#define nd_bsr4(reg) \
+ bus_space_read_4(nsc->sc_bst, nsc->sc_bsh, (reg))
+#define nd_bsw4(reg, val) \
+ bus_space_write_4(nsc->sc_bst, nsc->sc_bsh, (reg), (val))
+
#ifdef ESP_DEBUG
#define XCHR(x) hexdigits[(x) & 0xf]
static void
@@ -188,18 +193,22 @@
printf("00000000 ");
for(i = 0; i < len; i++) {
- printf("%c%c ", XCHR(pkt[i]>>4), XCHR(pkt[i]));
+ printf("%c%c ", XCHR(pkt[i] >> 4), XCHR(pkt[i]));
if ((i + 1) % 16 == 8) {
printf(" ");
}
if ((i + 1) % 16 == 0) {
printf(" %c", '|');
for(j = 0; j < 16; j++) {
- printf("%c", pkt[i-15+j]>=32 && pkt[i-15+j]<127?pkt[i-15+j]:'.');
+ printf("%c", pkt[i - 15 + j] >= 32 &&
+ pkt[i - 15 + j] < 127 ?
+ pkt[i - 15 + j] : '.');
}
- printf("%c\n%c%c%c%c%c%c%c%c ", '|',
- XCHR((i+1)>>28),XCHR((i+1)>>24),XCHR((i+1)>>20),XCHR((i+1)>>16),
- XCHR((i+1)>>12), XCHR((i+1)>>8), XCHR((i+1)>>4), XCHR(i+1));
+ printf("%c\n%c%c%c%c%c%c%c%c ", '|',
+ XCHR((i + 1) >> 28), XCHR((i + 1) >> 24),
+ XCHR((i + 1) >> 20), XCHR((i + 1) >> 16),
+ XCHR((i + 1) >> 12), XCHR((i + 1) >> 8),
+ XCHR((i + 1) >> 4), XCHR(i + 1));
}
}
printf("\n");
@@ -226,10 +235,10 @@
struct ncr53c9x_softc *sc = &esc->sc_ncr53c9x;
int error;
- if (!esc->sc_dma) {
+ if (esc->sc_dma == NULL) {
aprint_normal("%s", device_xname(sc->sc_dev));
esc->sc_dma = nextdma_findchannel("scsi");
- if (!esc->sc_dma)
+ if (esc->sc_dma == NULL)
panic("%s: can't find DMA channel",
device_xname(sc->sc_dev));
}
@@ -240,23 +249,21 @@
nextdma_setconf(esc->sc_dma, cb_arg, sc);
error = bus_dmamap_create(esc->sc_dma->sc_dmat,
- sc->sc_maxxfer,
- sc->sc_maxxfer / PAGE_SIZE + 1,
- sc->sc_maxxfer,
- 0, BUS_DMA_ALLOCNOW, &esc->sc_main_dmamap);
- if (error) {
+ sc->sc_maxxfer, sc->sc_maxxfer / PAGE_SIZE + 1, sc->sc_maxxfer,
+ 0, BUS_DMA_ALLOCNOW, &esc->sc_main_dmamap);
+ if (error != 0) {
panic("%s: can't create main i/o DMA map, error = %d",
- device_xname(sc->sc_dev), error);
+ device_xname(sc->sc_dev), error);
}
error = bus_dmamap_create(esc->sc_dma->sc_dmat,
- ESP_DMA_TAILBUFSIZE, 1, ESP_DMA_TAILBUFSIZE,
- 0, BUS_DMA_ALLOCNOW, &esc->sc_tail_dmamap);
- if (error) {
+ ESP_DMA_TAILBUFSIZE, 1, ESP_DMA_TAILBUFSIZE,
+ 0, BUS_DMA_ALLOCNOW, &esc->sc_tail_dmamap);
+ if (error != 0) {
panic("%s: can't create tail i/o DMA map, error = %d",
- device_xname(sc->sc_dev), error);
+ device_xname(sc->sc_dev), error);
}
-
+
#if 0
/* Turn on target selection using the `DMA' method */
sc->sc_features |= NCR_F_DMASELECT;
@@ -273,7 +280,7 @@
/* register interrupt stats */
evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
- device_xname(sc->sc_dev), "intr");
+ device_xname(sc->sc_dev), "intr");
aprint_normal_dev(sc->sc_dev, "using DMA channel %s\n",
device_xname(esc->sc_dma->sc_dev));
@@ -293,11 +300,11 @@
#endif
esc->sc_bst = ia->ia_bst;
- if (bus_space_map(esc->sc_bst, NEXT_P_SCSI,
- ESP_DEVICE_SIZE, 0, &esc->sc_bsh)) {
+ if (bus_space_map(esc->sc_bst, NEXT_P_SCSI,
+ ESP_DEVICE_SIZE, 0, &esc->sc_bsh)) {
aprint_normal("\n");
panic("%s: can't map ncr53c90 registers",
- device_xname(self));
+ device_xname(self));
}
sc->sc_id = 7;
@@ -365,8 +372,8 @@
/*
* Alas, we must now modify the value a bit, because it's
- * only valid when can switch on FASTCLK and FASTSCSI bits
- * in config register 3...
+ * only valid when can switch on FASTCLK and FASTSCSI bits
+ * in config register 3...
*/
switch (sc->sc_rev) {
case NCR_VARIANT_ESP100:
@@ -387,16 +394,16 @@
}
/* @@@ Some ESP_DCTL bits probably need setting */
- NCR_WRITE_REG(sc, ESP_DCTL,
+ NCR_WRITE_REG(sc, ESP_DCTL,
ESPDCTL_16MHZ | ESPDCTL_INTENB | ESPDCTL_RESET);
DELAY(10);
- DPRINTF(("esp dctl is 0x%02x\n",NCR_READ_REG(sc,ESP_DCTL)));
+ DPRINTF(("esp dctl is 0x%02x\n", NCR_READ_REG(sc,ESP_DCTL)));
NCR_WRITE_REG(sc, ESP_DCTL, ESPDCTL_16MHZ | ESPDCTL_INTENB);
DELAY(10);
- DPRINTF(("esp dctl is 0x%02x\n",NCR_READ_REG(sc,ESP_DCTL)));
+ DPRINTF(("esp dctl is 0x%02x\n", NCR_READ_REG(sc, ESP_DCTL)));
- esc->sc_dma = nextdma_findchannel ("scsi");
- if (esc->sc_dma) {
+ esc->sc_dma = nextdma_findchannel("scsi");
+ if (esc->sc_dma != NULL) {
findchannel_defer(self);
} else {
aprint_normal("\n");
@@ -433,7 +440,9 @@
int
doze(volatile int c)
{
-/* static int tmp1; */
+#if 0
+ static int tmp1;
+#endif
uint32_t tmp1;
volatile uint8_t tmp2;
volatile uint8_t *reg = (volatile uint8_t *)IIOV(xADDR);
@@ -442,7 +451,9 @@
return 0;
if (c == 0)
return 0;
-/* ((*(volatile u_long *)IIOV(NEXT_P_INTRMASK))&=(~NEXT_I_BIT(x))) */
+#if 0
+ ((*(volatile u_long *)IIOV(NEXT_P_INTRMASK)) &= (~NEXT_I_BIT(x)));
+#endif
(*reg) = 0;
(*reg) = 0;
do {
@@ -459,7 +470,7 @@
struct esp_softc *esc = (struct esp_softc *)sc;
if (INTR_OCCURRED(NEXT_I_SCSI)) {
- NDTRACEIF (ndtrace_addc('i'));
+ NDTRACEIF(ndtrace_addc('i'));
NCR_WRITE_REG(sc, ESP_DCTL,
ESPDCTL_16MHZ | ESPDCTL_INTENB |
(esc->sc_datain ? ESPDCTL_DMARD : 0));
@@ -469,11 +480,6 @@
}
}
-#define nd_bsr4(reg) \
- bus_space_read_4(nsc->sc_bst, nsc->sc_bsh, (reg))
-#define nd_bsw4(reg,val) \
- bus_space_write_4(nsc->sc_bst, nsc->sc_bsh, (reg), (val))
-
int
esp_dma_intr(struct ncr53c9x_softc *sc)
{
@@ -485,9 +491,11 @@
r = 1;
- NDTRACEIF (ndtrace_addc('I'));
+ NDTRACEIF(ndtrace_addc('I'));
if (r) {
- /* printf ("esp_dma_isintr start\n"); */
+#if 0
+ printf("esp_dma_isintr start\n");
+#endif
{
int s = spldma();
void *ndmap = stat->nd_map;
@@ -497,23 +505,24 @@
flushcount = 0;
#ifdef ESP_DEBUG
-/* esp_dma_nest++; */
+#if 0
+ esp_dma_nest++;
+#endif
if (esp_debug) {
char sbuf[256];
- snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS,
+ snprintb(sbuf, sizeof(sbuf), NEXT_INTR_BITS,
(*(volatile u_long *)IIOV(NEXT_P_INTRSTAT)));
-
+
printf("esp_dma_isintr = %s\n", sbuf);
}
#endif
mutex_exit(&sc->sc_lock); /* for nextdma intr */
while (!nextdma_finished(nsc)) {
- /* esp_dma_isactive(sc)) { */
- NDTRACEIF (ndtrace_addc('w'));
- NDTRACEIF (
+ NDTRACEIF(ndtrace_addc('w'));
+ NDTRACEIF(
ndtrace_printf("f%dm%dl%dw",
NCR_READ_REG(sc, NCR_FFLAG) &
NCRFIFO_FF,
@@ -530,17 +539,17 @@
s = spldma();
while (ndmap == stat->nd_map &&
ndidx == stat->nd_idx &&
- (nd_bsr4 (DD_CSR) & 0x08000000) == 0&&
+ (nd_bsr4(DD_CSR) & 0x08000000) == 0 &&
++flushcount < 5) {
splx(s);
- NDTRACEIF (ndtrace_addc('F'));
+ NDTRACEIF(ndtrace_addc('F'));
NCR_WRITE_REG(sc, ESP_DCTL,
ESPDCTL_FLUSH | ESPDCTL_16MHZ |
ESPDCTL_INTENB | ESPDCTL_DMAMOD |
(esc->sc_datain ?
ESPDCTL_DMARD : 0));
doze(0x32);
- NCR_WRITE_REG(sc, ESP_DCTL,
+ NCR_WRITE_REG(sc, ESP_DCTL,
ESPDCTL_16MHZ | ESPDCTL_INTENB |
ESPDCTL_DMAMOD |
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