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[src/trunk]: src/sys/arch/arm enable rkv1crypto on rock64.
details: https://anonhg.NetBSD.org/src/rev/4af647a8fd86
branches: trunk
changeset: 374461:4af647a8fd86
user: mrg <mrg%NetBSD.org@localhost>
date: Mon Apr 24 05:16:01 2023 +0000
description:
enable rkv1crypto on rock64.
this comes from upstream d1152bc533c941f7e267bf53d344cee510ea2808.
(i tried to make this be in rk3328.dtsi so all rk3328 boards would
benefit, but it doesn't work, and this is the only one have to test.)
adjust rkv1crypto to support a per-platform clocks setup.
diffstat:
sys/arch/arm/dts/rk3328-crypto.dtsi | 19 +++++++++++++++++++
sys/arch/arm/dts/rk3328-rock64.dts | 34 ++++++++++++++++++++++++++++++++++
sys/arch/arm/rockchip/rk3328_cru.c | 13 +++++++++++--
sys/arch/arm/rockchip/rk_v1crypto.c | 28 +++++++++++++++++++++++-----
4 files changed, 87 insertions(+), 7 deletions(-)
diffs (173 lines):
diff -r 7e28b605434e -r 4af647a8fd86 sys/arch/arm/dts/rk3328-crypto.dtsi
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/dts/rk3328-crypto.dtsi Mon Apr 24 05:16:01 2023 +0000
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/* From upstream d1152bc533c941f7e267bf53d344cee510ea2808 */
+
+/ {
+ crypto: crypto@ff060000 {
+ compatible = "rockchip,rk3328-crypto";
+ reg = <0x0 0xff060000 0x0 0x4000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>,
+ <&cru SCLK_CRYPTO>;
+ clock-names = "hclk_master", "hclk_slave", "sclk";
+ resets = <&cru SRST_CRYPTO>;
+ reset-names = "crypto-rst";
+ };
+};
diff -r 7e28b605434e -r 4af647a8fd86 sys/arch/arm/dts/rk3328-rock64.dts
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/dts/rk3328-rock64.dts Mon Apr 24 05:16:01 2023 +0000
@@ -0,0 +1,34 @@
+/* $NetBSD: rk3328-rock64.dts,v 1.8 2023/04/24 05:16:01 mrg Exp $ */
+
+/*
+ * Copyright (c) 2023 Matthew R. Green
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/* Include the crypto block in RK3328. */
+
+#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/rk3328-rock64.dts"
+#include "rk3328-crypto.dtsi"
diff -r 7e28b605434e -r 4af647a8fd86 sys/arch/arm/rockchip/rk3328_cru.c
--- a/sys/arch/arm/rockchip/rk3328_cru.c Mon Apr 24 00:07:04 2023 +0000
+++ b/sys/arch/arm/rockchip/rk3328_cru.c Mon Apr 24 05:16:01 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3328_cru.c,v 1.9 2021/11/12 22:02:08 jmcneill Exp $ */
+/* $NetBSD: rk3328_cru.c,v 1.10 2023/04/24 05:16:01 mrg Exp $ */
/*-
* Copyright (c) 2018 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.9 2021/11/12 22:02:08 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk3328_cru.c,v 1.10 2023/04/24 05:16:01 mrg Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -357,6 +357,13 @@ static struct rk_cru_clk rk3328_cru_clks
CLKGATE_CON(2), /* gate_reg */
__BIT(6), /* gate_mask */
0),
+ RK_COMPOSITE(RK3328_SCLK_CRYPTO, "clk_crypto", mux_2plls_parents,
+ CLKSEL_CON(20), /* muxdiv_reg */
+ __BIT(7), /* mux_mask */
+ __BITS(4,0), /* div_mask */
+ CLKGATE_CON(2), /* gate_reg */
+ __BIT(4), /* gate_mask */
+ 0),
RK_DIV(0, "clk_24m", "xin24m", CLKSEL_CON(2), __BITS(12,8), 0),
@@ -464,6 +471,8 @@ static struct rk_cru_clk rk3328_cru_clks
RK_GATE(RK3328_HCLK_I2S1_8CH, "hclk_i2s1", "hclk_bus_pre", CLKGATE_CON(15), 4),
RK_GATE(RK3328_HCLK_I2S2_2CH, "hclk_i2s2", "hclk_bus_pre", CLKGATE_CON(15), 5),
RK_GATE(RK3328_HCLK_SPDIF_8CH, "hclk_spdif", "hclk_bus_pre", CLKGATE_CON(15), 6),
+ RK_GATE(RK3328_HCLK_CRYPTO_MST, "hclk_crypto_mst", "hclk_bus_pre", CLKGATE_CON(15), 7),
+ RK_GATE(RK3328_HCLK_CRYPTO_SLV, "hclk_crypto_slv", "hclk_bus_pre", CLKGATE_CON(15), 8),
RK_COMPOSITE(RK3328_SCLK_I2S1_OUT, "i2s1_out", mux_i2s1out_parents,
CLKSEL_CON(8), /* muxdiv_reg */
__BIT(12), /* mux_mask */
diff -r 7e28b605434e -r 4af647a8fd86 sys/arch/arm/rockchip/rk_v1crypto.c
--- a/sys/arch/arm/rockchip/rk_v1crypto.c Mon Apr 24 00:07:04 2023 +0000
+++ b/sys/arch/arm/rockchip/rk_v1crypto.c Mon Apr 24 05:16:01 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rk_v1crypto.c,v 1.10 2022/05/13 09:49:44 riastradh Exp $ */
+/* $NetBSD: rk_v1crypto.c,v 1.11 2023/04/24 05:16:01 mrg Exp $ */
/*-
* Copyright (c) 2020 The NetBSD Foundation, Inc.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.10 2022/05/13 09:49:44 riastradh Exp $");
+__KERNEL_RCSID(1, "$NetBSD: rk_v1crypto.c,v 1.11 2023/04/24 05:16:01 mrg Exp $");
#include <sys/types.h>
@@ -98,8 +98,24 @@ RKC_CTRL(struct rk_v1crypto_softc *sc, u
CFATTACH_DECL_NEW(rk_v1crypto, sizeof(struct rk_v1crypto_softc),
rk_v1crypto_match, rk_v1crypto_attach, NULL, NULL);
+struct rk_v1crypto_data {
+ int num_clks;
+ const char *const clks[];
+};
+
+static const struct rk_v1crypto_data rk3288_crypto_data = {
+ .num_clks = 4,
+ .clks = {"aclk", "hclk", "sclk", "apb_pclk"},
+};
+
+static const struct rk_v1crypto_data rk3328_crypto_data = {
+ .num_clks = 3,
+ .clks = {"hclk_master", "hclk_slave", "sclk"},
+};
+
static const struct device_compatible_entry compat_data[] = {
- { .compat = "rockchip,rk3288-crypto" },
+ { .compat = "rockchip,rk3288-crypto", .data = &rk3288_crypto_data },
+ { .compat = "rockchip,rk3328-crypto", .data = &rk3328_crypto_data },
DEVICE_COMPAT_EOL
};
@@ -114,7 +130,6 @@ rk_v1crypto_match(device_t parent, cfdat
static void
rk_v1crypto_attach(device_t parent, device_t self, void *aux)
{
- static const char *const clks[] = {"aclk", "hclk", "sclk", "apb_pclk"};
struct rk_v1crypto_softc *const sc = device_private(self);
const struct fdt_attach_args *const faa = aux;
bus_addr_t addr;
@@ -123,6 +138,9 @@ rk_v1crypto_attach(device_t parent, devi
struct fdtbus_reset *rst;
unsigned i;
uint32_t ctrl;
+ const struct rk_v1crypto_data *config =
+ of_compatible_lookup(phandle, compat_data)->data;
+ const char *const *clks = config->clks;
fdtbus_clock_assign(phandle);
@@ -141,7 +159,7 @@ rk_v1crypto_attach(device_t parent, devi
}
/* Enable the clocks. */
- for (i = 0; i < __arraycount(clks); i++) {
+ for (i = 0; i < config->num_clks; i++) {
if (fdtbus_clock_enable(phandle, clks[i], true) != 0) {
aprint_error(": couldn't enable %s clock\n", clks[i]);
return;
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