[src/trunk]: src/sys/arch/arm/at91 s/Registre/Register/ in comment.

[andvar <andvar%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/f7a7981e4a58
branches:  trunk
changeset: 374589:f7a7981e4a58
user:      andvar <andvar%NetBSD.org@localhost>
date:      Sat May 06 21:37:37 2023 +0000

description:
s/Registre/Register/ in comment.

diffstat:

 sys/arch/arm/at91/at91twireg.h |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (20 lines):

diff -r 8a48b2dbfd80 -r f7a7981e4a58 sys/arch/arm/at91/at91twireg.h
--- a/sys/arch/arm/at91/at91twireg.h    Sat May 06 21:34:39 2023 +0000
+++ b/sys/arch/arm/at91/at91twireg.h    Sat May 06 21:37:37 2023 +0000
@@ -1,5 +1,5 @@
-/*     $Id: at91twireg.h,v 1.2 2008/07/03 01:15:38 matt Exp $  */
-/*     $NetBSD: at91twireg.h,v 1.2 2008/07/03 01:15:38 matt Exp $      */
+/*     $Id: at91twireg.h,v 1.3 2023/05/06 21:37:37 andvar Exp $        */
+/*     $NetBSD: at91twireg.h,v 1.3 2023/05/06 21:37:37 andvar Exp $    */
 
 /*-
  * Copyright (c) 2007 Embedtronics Oy.
@@ -54,7 +54,7 @@
 #define        TWI_RHR         0x30U   /* 0x30: Receive Holding Register       */
 #define        TWI_THR         0x34U   /* 0x34: Transmit Holding Register      */
 
-/* Control Registre bits: */
+/* Control Register bits: */
 #define        TWI_CR_SWRST    0x80U   /* 1 = do software reset                */
 #define        TWI_CR_MSDIS    0x08U   /* 1 = disable master mode              */
 #define        TWI_CR_MSEN     0x04U   /* 1 = enable master mode               */