[src/trunk]: src/sys/dev/pci correct register function annotation as it's for...

[nisimura <nisimura%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/2853ab7b7145
branches:  trunk
changeset: 376673:2853ab7b7145
user:      nisimura <nisimura%NetBSD.org@localhost>
date:      Tue Jun 27 21:43:58 2023 +0000

description:
correct register function annotation as it's for receive coalesce.

diffstat:

 sys/dev/pci/if_bce.c    |  6 +++---
 sys/dev/pci/if_bcereg.h |  4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diffs (45 lines):

diff -r dc3d48db17f6 -r 2853ab7b7145 sys/dev/pci/if_bce.c
--- a/sys/dev/pci/if_bce.c      Tue Jun 27 19:30:27 2023 +0000
+++ b/sys/dev/pci/if_bce.c      Tue Jun 27 21:43:58 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $    */
+/* $NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $  */
 
 /*
  * Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.62 2022/09/25 12:41:46 andvar Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_bce.c,v 1.63 2023/06/27 21:43:58 nisimura Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -928,7 +928,7 @@ bce_init(struct ifnet *ifp)
            bus_space_read_4(sc->bce_btag, sc->bce_bhandle, BCE_MACCTL) &
            ~BCE_EMC_PDOWN);
 
-       /* setup DMA interrupt control */
+       /* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
        bus_space_write_4(sc->bce_btag, sc->bce_bhandle, BCE_DMAI_CTL, 1 << 24);        /* MAGIC */
 
        /* setup packet filter */
diff -r dc3d48db17f6 -r 2853ab7b7145 sys/dev/pci/if_bcereg.h
--- a/sys/dev/pci/if_bcereg.h   Tue Jun 27 19:30:27 2023 +0000
+++ b/sys/dev/pci/if_bcereg.h   Tue Jun 27 21:43:58 2023 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: if_bcereg.h,v 1.5 2019/10/18 23:08:29 msaitoh Exp $         */
+/* $NetBSD: if_bcereg.h,v 1.6 2023/06/27 21:43:58 nisimura Exp $        */
 
 /*
  * Copyright (c) 2003 Clifford Wright. All rights reserved.
@@ -76,7 +76,7 @@
 #define BCE_EMC_EDET                   0x00000008      /* PHY energy detect */
 #define BCE_EMC_LED                    0x000000e0      /* PHY LED control */
 
-/* DMA Interrupt control */
+/* recv coalesce; 31:24 frame upper bound, 23:0 guard period */
 #define BCE_DMAI_CTL                   0x0100
 
 /* DMA registers */