jonathan
Fri May 12 19:27:30 EDT 1995
Update of /a/cvsroot/src/sys/arch/pmax/pmax
In directory pain.lcs.mit.edu:/b/tmp/cvs-serv20597

Modified Files:
	trap.c machdep.c 
Log Message:
Redo 3MAX+ (5k/240) interrupt enable code.

Instead of being a no-op, kn03_intr_enable() sets the sw copy of the
interrupt-enable mask *and* writes it into the IO asic intr-enable
register.  Boot code sets the sw copy (kn03_tc_imask) to something
sane (KN03_IM0, with tc option slots turned off).  Tested and works.
Interrupt code for other IOASIC machines should be redone so that
interrupts for devices are enabled by drivers, rather than by
cpu-specific boot code.  Functions common to all IOASIC machines
(PSWARN?) should be done by asic_init().

Checked in without the above changes so that 3MAX+, MAXINE and 3MIN
interrupt-(enable,handle) can converge.