Module Name:	syssrc
Committed By:	scw
Date:		Wed Jun  7 20:42:54 UTC 2000

Modified Files:
	syssrc/sys/dev/pci: pciide.c pciide_opti_reg.h

Log Message:
The OPTi controller supports a 32-bit dataport after all.
Also detect when the chip is sitting on a 25MHz PCIbus and
set the timing registers accordingly.


To generate a diff of this commit:
cvs rdiff -r1.65 -r1.66 syssrc/sys/dev/pci/pciide.c
cvs rdiff -r1.1 -r1.2 syssrc/sys/dev/pci/pciide_opti_reg.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.