Subject: CVS commit: syssrc
To: None <source-changes@netbsd.org>
From: Jeff Smith <jeffs@netbsd.org>
List: source-changes
Date: 07/25/2000 20:56:06
Module Name: syssrc
Committed By: jeffs
Date: Tue Jul 25 17:56:06 UTC 2000
Modified Files:
syssrc/sys/arch/mips/include: asm.h
syssrc/sys/arch/mips/mips: locore.S locore_mips3.S
Log Message:
Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
To generate a diff of this commit:
cvs rdiff -r1.24 -r1.25 syssrc/sys/arch/mips/include/asm.h
cvs rdiff -r1.110 -r1.111 syssrc/sys/arch/mips/mips/locore.S
cvs rdiff -r1.41 -r1.42 syssrc/sys/arch/mips/mips/locore_mips3.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.