Module Name:	syssrc
Committed By:	reinoud
Date:		Sun Feb 18 12:21:03 UTC 2001

Modified Files:
	syssrc/sys/arch/arm32/arm32: cpufunc.c locore.S

Log Message:
Fix to solve PR arm32/9208 "RiscPC reboot hangs"
Due to the StrongARM support code in the cpu_reset() MC-function,
an instruction was executed to drain the write back buffer on StrongARM
processors (might even be armv4+).

Since ARM{6,7} don't recognize this instruction they will either except
for an illegal instruction on this or have undefined behaviour resulting
in an endless illegal instruction/data abort/reset behaviour.

The fix contains a flag that signals if the WB flush should be executed
or not for the detected processor.


To generate a diff of this commit:
cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/arm32/arm32/cpufunc.c
cvs rdiff -r1.35 -r1.36 syssrc/sys/arch/arm32/arm32/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.