Module Name:	syssrc
Committed By:	bjh21
Date:		Fri Apr 13 14:50:47 UTC 2001

Modified Files:
	syssrc/sys/arch/arm26/arm26: bus.c

Log Message:
Rev 1.3 accidentally undid rev 1.2.  Re-do it.


To generate a diff of this commit:
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/arm26/arm26/bus.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.