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CVS commit: syssrc



Module Name:    syssrc
Committed By:   thorpej
Date:           Mon Jun 11 23:52:39 UTC 2001

Modified Files:
        syssrc/sys/arch/mips/include: locore.h
        syssrc/sys/arch/mips/mips: locore_mips3.S mips_machdep.c

Log Message:
Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way.  Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).

These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.


To generate a diff of this commit:
cvs rdiff -r1.52 -r1.53 syssrc/sys/arch/mips/include/locore.h
cvs rdiff -r1.68 -r1.69 syssrc/sys/arch/mips/mips/locore_mips3.S
cvs rdiff -r1.117 -r1.118 syssrc/sys/arch/mips/mips/mips_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.




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