Module Name:	syssrc
Committed By:	thorpej
Date:		Wed Nov 14 01:00:06 UTC 2001

Modified Files:
	syssrc/sys/arch/arm/arm: cpufunc.c cpufunc_asm_xscale.S
	syssrc/sys/arch/arm/include: cpufunc.h

Log Message:
* Give the XScale its own cpu_control() entry point; we have to flush
  the Branch Target Buffer of the BPRD bit changes.
* Enable Branch Prediction on the XScale by default.
* Don't invalidate the Branch Target Buffer explicitly. the i80200
  manual (section 5.1, Branch Target Buffer Operation) notes that
  manual software management of the BTB is unnecessary; it is flushed
  implicitly when:
     * processor resets
     * FCSE process ID is written
     * I-cache is invalidated


To generate a diff of this commit:
cvs rdiff -r1.14 -r1.15 syssrc/sys/arch/arm/arm/cpufunc.c
cvs rdiff -r1.3 -r1.4 syssrc/sys/arch/arm/arm/cpufunc_asm_xscale.S
cvs rdiff -r1.10 -r1.11 syssrc/sys/arch/arm/include/cpufunc.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.