Module Name:	syssrc
Committed By:	scw
Date:		Fri Jul  5 13:32:08 UTC 2002

Modified Files:
	syssrc/sys/arch: README
Added Files:
	basesrc/lib/csu/sh5: Makefile crt0.c dot_init.h
	basesrc/lib/libc/arch/sh5/gen: Makefile.inc _setjmp.S alloca.S
	    byte_swap_2.S byte_swap_4.S byte_swap_8.S fabs.S sigsetjmp.S
	basesrc/lib/libc/arch/sh5/net: Makefile.inc
	basesrc/lib/libc/arch/sh5/stdlib: Makefile.inc abs.S llabs.S
	basesrc/lib/libc/arch/sh5/sys: Ovfork.S __clone.S __semctl.S
	    __sigreturn14.S __syscall.S __vfork14.S brk.S cerror.S exect.S
	    fork.S msgctl.S pipe.S ptrace.S sbrk.S setlogin.S shmat.S shmctl.S
	    sigaction.S sigpending.S sigprocmask.S sigreturn.S sigsuspend.S
	    syscall.S
	syssrc/sys/arch/evbsh5/compile: .keep_me
	syssrc/sys/arch/evbsh5/conf: CAYMAN SIMULATOR files.evbsh5
	    std.evbsh5.el
	syssrc/sys/arch/evbsh5/dev: superio.c superioreg.h superiovar.h
	    sysfpga.c sysfpgareg.h sysfpgavar.h
	syssrc/sys/arch/evbsh5/evbsh5: cons_machdep.c locore.S machdep.c
	    machdep.h mainbus.c
	syssrc/sys/arch/evbsh5/include: ansi.h aout_machdep.h asm.h
	    bootparams.h bswap.h bus.h cacheops.h cdefs.h conreg.h cpu.h
	    disklabel.h elf_machdep.h endian.h endian_machdep.h frame.h
	    int_const.h int_fmtio.h int_limits.h int_mwgwtypes.h int_types.h
	    intr.h isa_machdep.h limits.h lock.h memregion.h param.h pcb.h
	    pmap.h proc.h ptrace.h reg.h setjmp.h signal.h stdarg.h trap.h
	    types.h varargs.h vmparam.h
	syssrc/sys/arch/sh5/conf: Makefile.sh5 files.sh5
	syssrc/sys/arch/sh5/dev: cprc.c cprcreg.h cprcvar.h cpu_sh.c dtfcons.c
	    dtfconsvar.h femi.c femivar.h intc.c intcreg.h intcvar.h pbridge.c
	    pbridgereg.h pbridgevar.h rtc.c rtcreg.h rtcvar.h scif.c scifreg.h
	    scifvar.h superhyway.c superhywayvar.h tmu.c tmureg.h
	syssrc/sys/arch/sh5/include: ansi.h aout_machdep.h asm.h bswap.h bus.h
	    cacheops.h cdefs.h conreg.h cpu.h cputypes.h db_machdep.h
	    disklabel.h elf_machdep.h endian.h endian_machdep.h frame.h
	    int_const.h int_fmtio.h int_limits.h int_mwgwtypes.h int_types.h
	    intr.h limits.h lock.h memregion.h param.h pcb.h pmap.h proc.h
	    pte.h ptrace.h reg.h setjmp.h signal.h stdarg.h trap.h types.h
	    varargs.h vmparam.h
	syssrc/sys/arch/sh5/sh5: autoconf.c bus_dma.c bus_space.c bus_subr.S
	    clockvar.h conf.c cpu_switch.S disksubr.c dtf_comms.c dtf_comms.h
	    exception.S genassym.cf in_cksum.c interrupt.c locore_subr.S
	    mainbus.h mem.c pmap.c process_machdep.c sh5_clock.c sh5_machdep.c
	    sig_machdep.c sigcode.S softintr.c stb1_locore.S stb1var.h
	    syscall.c trap.c vm_machdep.c
	syssrc/sys/lib/libkern/arch/sh5: Makefile.inc sdivsi3.S udivsi3.S

Log Message:
NetBSD, meet the SH-5 cpu.
SH-5, meet NetBSD.

Let's hope this is the start of a long and fruitful relationship. :-)

This code, funded by Wasabi Systems, adds initial support for the
Hitachi SuperH(tm) SH-5 cpu architecture to NetBSD.

At the present time, NetBSD/evbsh5 only runs on a SH-5 core simulator
which has no simulated devices other than a simple console. However, it
is good enough to get to the "root device: " prompt.

Device driver support for Real SH-5 Hardware is in place, particularly for
supporting the up-coming Cayman evaluation board, and should be quite
easy to get running when the hardware is available.

There is no in-tree toolchain for this port at this time. Gcc-current has
rudimentary SH-5 support but it is known to be buggy. A working toolchain
was obtained from SuperH to facilitate this port. Gcc-current will be
fixed in due course.

The SH-5 architecture is fully 64-bit capable, although NetBSD/evbsh5 has
currently only been tested in 32-bit mode. It is bi-endian, via a boot-
time option and it also has an "SHcompact" mode in which it will execute
SH-[34] user-land instructions.

For more information on the SH-5, see www.superh.com. Suffice to say it
is *not* just another respin of the SH-[34].


To generate a diff of this commit:
cvs rdiff -r0 -r1.1 basesrc/lib/csu/sh5/Makefile basesrc/lib/csu/sh5/crt0.c \
    basesrc/lib/csu/sh5/dot_init.h
cvs rdiff -r0 -r1.1 basesrc/lib/libc/arch/sh5/gen/Makefile.inc \
    basesrc/lib/libc/arch/sh5/gen/_setjmp.S \
    basesrc/lib/libc/arch/sh5/gen/alloca.S \
    basesrc/lib/libc/arch/sh5/gen/byte_swap_2.S \
    basesrc/lib/libc/arch/sh5/gen/byte_swap_4.S \
    basesrc/lib/libc/arch/sh5/gen/byte_swap_8.S \
    basesrc/lib/libc/arch/sh5/gen/fabs.S \
    basesrc/lib/libc/arch/sh5/gen/sigsetjmp.S
cvs rdiff -r0 -r1.1 basesrc/lib/libc/arch/sh5/net/Makefile.inc
cvs rdiff -r0 -r1.1 basesrc/lib/libc/arch/sh5/stdlib/Makefile.inc \
    basesrc/lib/libc/arch/sh5/stdlib/abs.S \
    basesrc/lib/libc/arch/sh5/stdlib/llabs.S
cvs rdiff -r0 -r1.1 basesrc/lib/libc/arch/sh5/sys/Ovfork.S \
    basesrc/lib/libc/arch/sh5/sys/__clone.S \
    basesrc/lib/libc/arch/sh5/sys/__semctl.S \
    basesrc/lib/libc/arch/sh5/sys/__sigreturn14.S \
    basesrc/lib/libc/arch/sh5/sys/__syscall.S \
    basesrc/lib/libc/arch/sh5/sys/__vfork14.S \
    basesrc/lib/libc/arch/sh5/sys/brk.S \
    basesrc/lib/libc/arch/sh5/sys/cerror.S \
    basesrc/lib/libc/arch/sh5/sys/exect.S \
    basesrc/lib/libc/arch/sh5/sys/fork.S \
    basesrc/lib/libc/arch/sh5/sys/msgctl.S \
    basesrc/lib/libc/arch/sh5/sys/pipe.S \
    basesrc/lib/libc/arch/sh5/sys/ptrace.S \
    basesrc/lib/libc/arch/sh5/sys/sbrk.S \
    basesrc/lib/libc/arch/sh5/sys/setlogin.S \
    basesrc/lib/libc/arch/sh5/sys/shmat.S \
    basesrc/lib/libc/arch/sh5/sys/shmctl.S \
    basesrc/lib/libc/arch/sh5/sys/sigaction.S \
    basesrc/lib/libc/arch/sh5/sys/sigpending.S \
    basesrc/lib/libc/arch/sh5/sys/sigprocmask.S \
    basesrc/lib/libc/arch/sh5/sys/sigreturn.S \
    basesrc/lib/libc/arch/sh5/sys/sigsuspend.S \
    basesrc/lib/libc/arch/sh5/sys/syscall.S
cvs rdiff -r1.24 -r1.25 syssrc/sys/arch/README
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbsh5/compile/.keep_me
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbsh5/conf/CAYMAN \
    syssrc/sys/arch/evbsh5/conf/SIMULATOR \
    syssrc/sys/arch/evbsh5/conf/files.evbsh5 \
    syssrc/sys/arch/evbsh5/conf/std.evbsh5.el
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbsh5/dev/superio.c \
    syssrc/sys/arch/evbsh5/dev/superioreg.h \
    syssrc/sys/arch/evbsh5/dev/superiovar.h \
    syssrc/sys/arch/evbsh5/dev/sysfpga.c \
    syssrc/sys/arch/evbsh5/dev/sysfpgareg.h \
    syssrc/sys/arch/evbsh5/dev/sysfpgavar.h
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbsh5/evbsh5/cons_machdep.c \
    syssrc/sys/arch/evbsh5/evbsh5/locore.S \
    syssrc/sys/arch/evbsh5/evbsh5/machdep.c \
    syssrc/sys/arch/evbsh5/evbsh5/machdep.h \
    syssrc/sys/arch/evbsh5/evbsh5/mainbus.c
cvs rdiff -r0 -r1.1 syssrc/sys/arch/evbsh5/include/ansi.h \
    syssrc/sys/arch/evbsh5/include/aout_machdep.h \
    syssrc/sys/arch/evbsh5/include/asm.h \
    syssrc/sys/arch/evbsh5/include/bootparams.h \
    syssrc/sys/arch/evbsh5/include/bswap.h \
    syssrc/sys/arch/evbsh5/include/bus.h \
    syssrc/sys/arch/evbsh5/include/cacheops.h \
    syssrc/sys/arch/evbsh5/include/cdefs.h \
    syssrc/sys/arch/evbsh5/include/conreg.h \
    syssrc/sys/arch/evbsh5/include/cpu.h \
    syssrc/sys/arch/evbsh5/include/disklabel.h \
    syssrc/sys/arch/evbsh5/include/elf_machdep.h \
    syssrc/sys/arch/evbsh5/include/endian.h \
    syssrc/sys/arch/evbsh5/include/endian_machdep.h \
    syssrc/sys/arch/evbsh5/include/frame.h \
    syssrc/sys/arch/evbsh5/include/int_const.h \
    syssrc/sys/arch/evbsh5/include/int_fmtio.h \
    syssrc/sys/arch/evbsh5/include/int_limits.h \
    syssrc/sys/arch/evbsh5/include/int_mwgwtypes.h \
    syssrc/sys/arch/evbsh5/include/int_types.h \
    syssrc/sys/arch/evbsh5/include/intr.h \
    syssrc/sys/arch/evbsh5/include/isa_machdep.h \
    syssrc/sys/arch/evbsh5/include/limits.h \
    syssrc/sys/arch/evbsh5/include/lock.h \
    syssrc/sys/arch/evbsh5/include/memregion.h \
    syssrc/sys/arch/evbsh5/include/param.h \
    syssrc/sys/arch/evbsh5/include/pcb.h \
    syssrc/sys/arch/evbsh5/include/pmap.h \
    syssrc/sys/arch/evbsh5/include/proc.h \
    syssrc/sys/arch/evbsh5/include/ptrace.h \
    syssrc/sys/arch/evbsh5/include/reg.h \
    syssrc/sys/arch/evbsh5/include/setjmp.h \
    syssrc/sys/arch/evbsh5/include/signal.h \
    syssrc/sys/arch/evbsh5/include/stdarg.h \
    syssrc/sys/arch/evbsh5/include/trap.h \
    syssrc/sys/arch/evbsh5/include/types.h \
    syssrc/sys/arch/evbsh5/include/varargs.h \
    syssrc/sys/arch/evbsh5/include/vmparam.h
cvs rdiff -r0 -r1.1 syssrc/sys/arch/sh5/conf/Makefile.sh5 \
    syssrc/sys/arch/sh5/conf/files.sh5
cvs rdiff -r0 -r1.1 syssrc/sys/arch/sh5/dev/cprc.c \
    syssrc/sys/arch/sh5/dev/cprcreg.h syssrc/sys/arch/sh5/dev/cprcvar.h \
    syssrc/sys/arch/sh5/dev/cpu_sh.c syssrc/sys/arch/sh5/dev/dtfcons.c \
    syssrc/sys/arch/sh5/dev/dtfconsvar.h syssrc/sys/arch/sh5/dev/femi.c \
    syssrc/sys/arch/sh5/dev/femivar.h syssrc/sys/arch/sh5/dev/intc.c \
    syssrc/sys/arch/sh5/dev/intcreg.h syssrc/sys/arch/sh5/dev/intcvar.h \
    syssrc/sys/arch/sh5/dev/pbridge.c syssrc/sys/arch/sh5/dev/pbridgereg.h \
    syssrc/sys/arch/sh5/dev/pbridgevar.h syssrc/sys/arch/sh5/dev/rtc.c \
    syssrc/sys/arch/sh5/dev/rtcreg.h syssrc/sys/arch/sh5/dev/rtcvar.h \
    syssrc/sys/arch/sh5/dev/scif.c syssrc/sys/arch/sh5/dev/scifreg.h \
    syssrc/sys/arch/sh5/dev/scifvar.h syssrc/sys/arch/sh5/dev/superhyway.c \
    syssrc/sys/arch/sh5/dev/superhywayvar.h syssrc/sys/arch/sh5/dev/tmu.c \
    syssrc/sys/arch/sh5/dev/tmureg.h
cvs rdiff -r0 -r1.1 syssrc/sys/arch/sh5/include/ansi.h \
    syssrc/sys/arch/sh5/include/aout_machdep.h \
    syssrc/sys/arch/sh5/include/asm.h syssrc/sys/arch/sh5/include/bswap.h \
    syssrc/sys/arch/sh5/include/bus.h syssrc/sys/arch/sh5/include/cacheops.h \
    syssrc/sys/arch/sh5/include/cdefs.h syssrc/sys/arch/sh5/include/conreg.h \
    syssrc/sys/arch/sh5/include/cpu.h syssrc/sys/arch/sh5/include/cputypes.h \
    syssrc/sys/arch/sh5/include/db_machdep.h \
    syssrc/sys/arch/sh5/include/disklabel.h \
    syssrc/sys/arch/sh5/include/elf_machdep.h \
    syssrc/sys/arch/sh5/include/endian.h \
    syssrc/sys/arch/sh5/include/endian_machdep.h \
    syssrc/sys/arch/sh5/include/frame.h \
    syssrc/sys/arch/sh5/include/int_const.h \
    syssrc/sys/arch/sh5/include/int_fmtio.h \
    syssrc/sys/arch/sh5/include/int_limits.h \
    syssrc/sys/arch/sh5/include/int_mwgwtypes.h \
    syssrc/sys/arch/sh5/include/int_types.h \
    syssrc/sys/arch/sh5/include/intr.h syssrc/sys/arch/sh5/include/limits.h \
    syssrc/sys/arch/sh5/include/lock.h \
    syssrc/sys/arch/sh5/include/memregion.h \
    syssrc/sys/arch/sh5/include/param.h syssrc/sys/arch/sh5/include/pcb.h \
    syssrc/sys/arch/sh5/include/pmap.h syssrc/sys/arch/sh5/include/proc.h \
    syssrc/sys/arch/sh5/include/pte.h syssrc/sys/arch/sh5/include/ptrace.h \
    syssrc/sys/arch/sh5/include/reg.h syssrc/sys/arch/sh5/include/setjmp.h \
    syssrc/sys/arch/sh5/include/signal.h syssrc/sys/arch/sh5/include/stdarg.h \
    syssrc/sys/arch/sh5/include/trap.h syssrc/sys/arch/sh5/include/types.h \
    syssrc/sys/arch/sh5/include/varargs.h \
    syssrc/sys/arch/sh5/include/vmparam.h
cvs rdiff -r0 -r1.1 syssrc/sys/arch/sh5/sh5/autoconf.c \
    syssrc/sys/arch/sh5/sh5/bus_dma.c syssrc/sys/arch/sh5/sh5/bus_space.c \
    syssrc/sys/arch/sh5/sh5/bus_subr.S syssrc/sys/arch/sh5/sh5/clockvar.h \
    syssrc/sys/arch/sh5/sh5/conf.c syssrc/sys/arch/sh5/sh5/cpu_switch.S \
    syssrc/sys/arch/sh5/sh5/disksubr.c syssrc/sys/arch/sh5/sh5/dtf_comms.c \
    syssrc/sys/arch/sh5/sh5/dtf_comms.h syssrc/sys/arch/sh5/sh5/exception.S \
    syssrc/sys/arch/sh5/sh5/genassym.cf syssrc/sys/arch/sh5/sh5/in_cksum.c \
    syssrc/sys/arch/sh5/sh5/interrupt.c syssrc/sys/arch/sh5/sh5/locore_subr.S \
    syssrc/sys/arch/sh5/sh5/mainbus.h syssrc/sys/arch/sh5/sh5/mem.c \
    syssrc/sys/arch/sh5/sh5/pmap.c syssrc/sys/arch/sh5/sh5/process_machdep.c \
    syssrc/sys/arch/sh5/sh5/sh5_clock.c syssrc/sys/arch/sh5/sh5/sh5_machdep.c \
    syssrc/sys/arch/sh5/sh5/sig_machdep.c syssrc/sys/arch/sh5/sh5/sigcode.S \
    syssrc/sys/arch/sh5/sh5/softintr.c syssrc/sys/arch/sh5/sh5/stb1_locore.S \
    syssrc/sys/arch/sh5/sh5/stb1var.h syssrc/sys/arch/sh5/sh5/syscall.c \
    syssrc/sys/arch/sh5/sh5/trap.c syssrc/sys/arch/sh5/sh5/vm_machdep.c
cvs rdiff -r0 -r1.1 syssrc/sys/lib/libkern/arch/sh5/Makefile.inc \
    syssrc/sys/lib/libkern/arch/sh5/sdivsi3.S \
    syssrc/sys/lib/libkern/arch/sh5/udivsi3.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.