Subject: CVS commit: syssrc/sys/arch/hp700
To: None <source-changes@netbsd.org>
From: Matthew Fredette <fredette@netbsd.org>
List: source-changes
Date: 08/14/2002 19:18:13
Module Name:	syssrc
Committed By:	fredette
Date:		Wed Aug 14 16:18:13 UTC 2002

Modified Files:
	syssrc/sys/arch/hp700/hp700: genassym.cf intr.c intr.h locore.S
	    softintr.c
	syssrc/sys/arch/hp700/include: intr.h

Log Message:
First pass at changing how spl masks are built.  Now there is no
longer a forced correspondence between bit numbers in an interrupt
register and bit numbers in an spl mask.  This will avoid conflicts
between various interrupt registers in the same system.

Instead, bits in the spl mask are allocated on a first come, first
served basis by devices which can interrupt.  The new hp700_intr_ipending_new
takes care of reading all interrupt request registers that need
servicing, and mapping the bits set in those registers to new bits
set in ipending.

This whole mechanism is in and works.  A later commit will see the
I/O subsystems fixing which bits in their interrupt registers are
connected to which devices, largely removing irq information from
kernel configuration files.  There will also be a cosmetic fix to
show which spl bit corresponds to a device.


To generate a diff of this commit:
cvs rdiff -r1.2 -r1.3 syssrc/sys/arch/hp700/hp700/genassym.cf \
    syssrc/sys/arch/hp700/hp700/locore.S \
    syssrc/sys/arch/hp700/hp700/softintr.c
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/hp700/hp700/intr.c \
    syssrc/sys/arch/hp700/hp700/intr.h
cvs rdiff -r1.1 -r1.2 syssrc/sys/arch/hp700/include/intr.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.