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CVS commit: syssrc/sys/arch/sh5/sh5
Module Name: syssrc
Committed By: scw
Date: Wed Aug 28 21:05:26 UTC 2002
Modified Files:
syssrc/sys/arch/sh5/sh5: exception.S
Log Message:
Oops, got the source operands for an "andc" reversed.
This gets the hardware interrupt event handler working.
To generate a diff of this commit:
cvs rdiff -r1.4 -r1.5 syssrc/sys/arch/sh5/sh5/exception.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
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