Subject: CVS commit: syssrc/sys/arch/powerpc/powerpc
To: None <source-changes@netbsd.org>
From: Matt Thomas <matt@netbsd.org>
List: source-changes
Date: 11/13/2002 11:33:21
Module Name:	syssrc
Committed By:	matt
Date:		Wed Nov 13 09:33:21 UTC 2002

Modified Files:
	syssrc/sys/arch/powerpc/powerpc: trap.c

Log Message:
Do kernel non-USER_SR pte spilling regardless of interrupt count.  Only do
kernel USER_SR spillage if interrupt depth is 0.


To generate a diff of this commit:
cvs rdiff -r1.72 -r1.73 syssrc/sys/arch/powerpc/powerpc/trap.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.